Printed Circuit Design & Fab Online Magazine - Current Issue

Current Issue

John Burkhert

The primary purpose of surface finishes is to prevent oxidation of the copper prior to soldering components.

Back when I held a soldering iron, we used a mixture of tin (63%) and lead (37%) for the solder (Sn63). The boards had the same coating on the plated holes and surface-mount pads. The application for surface mount is referred to as hot air solder leveling (HASL) and applies to any of the available solder types. The beauty of Sn63 is it has a lower melting point and is eutectic. “Eutectic” means the metal solidifies rapidly over a short temperature range. The benefit is fewer disturbed solder joints and good “wetting,” where the surface finish and the solder form a cohesive bond for a reliable connection. You can still buy Sn63 off the shelf at the local electronics store.

On the other hand, lead is a dangerous metal that can cause birth defects and other health issues. The Europeans took the vanguard with the RoHS initiative. If you want to sell electronics products to consumers, the lead content must be the minimum possible – not eliminated entirely but found primarily as a trace element within chips.

SAC (Sn-Ag-Cu): a heroic alloy. Metallurgists all over the world looked for replacement formulas. Tin is still viable and is generally mixed with small amounts of silver and other elements such as antimony, copper or bismuth. Tin makes up the bulk of the alloy, typically around 95% to 99.3%. If pure tin was used, the results could be problematic. Tin whiskers from dendritic growth present a shorting risk.

Read more: PCB Surface Finishes: When to Change It Up

John Burkhert

Does changing the clock make any difference to the PCB layout?

Every six months, it becomes apparent not enough of my household items are part of the “Internet of Things.” (Cue ominous violin squeals.) Can we talk about my spouse’s wall-clock fetish? At least the one in the bedroom doesn’t tick! And, of course, if a battery is near its end, an adjustment will probably put it out of business for good. It’s always something getting me back up on that step ladder.

Setting and resetting clocks is also a thing in PCB design.

Read more: External Oscillators: Placement and Routing Tradeoffs

John Burkhert

Shake, rattle and roll: Your devices often experience it all.

The stark choices of organisms are to adapt, move or die. Our electronics sometimes tough it out so we can do our jobs or simply have a good romp on our favorite ride. No matter the purpose, extreme weather puts an electrical system to the test.

Whether the element is sand, saltwater, sunshine or perhaps a lack of thereof, many dangers age a system prematurely. Most faults caused by the environment are single-component failures. Okay, a part failed. Why? What is the root cause, and what can we do to prevent it from becoming part of a larger trend? Answering that two-part question is the gist of reliability engineering.

What broke is not always evident. Cosmetic damage or a burn scar may point the way if you’re lucky. In most cases, diagnosis is not that easy. Check connectors first, while the board-level investigation usually centers around the FETs that bring power to the device that is out of spec or failing altogether. Somewhere in there a tiny junction has burned up. The repair and return unit or perhaps field service technicians are a good source of reliability anecdotes.

Read more: Preparing a PCBA for Harsh Environments

John Burkhert

Buried and blind vias solve most HDI routing studies.

A popular answer to a high density interconnect (HDI) problem is to start with a simple printed circuit board and then proceed to add on layer after layer. This is known as a sequential lamination process. For the sake of balance, the layers are always added to the top and bottom in pairs. A notation we use describes the sequence.

A typical example is a board that starts with N number of layers in the initial pressing and has three additional lamination steps after that. Each additional pressing adds two layers: one above and one below the previous step. The shorthand for that type of construction is 3+N+3 or simply a 3N3 stack-up.

We could get more detailed and substitute the actual number of layers in the first pressing for the N and call it, for instance, a 3+4+3 board for an even 10 layers. The fact is the fabricator is more concerned about how many layers are added afterward than how many are used in the first step (FIGURE 1).

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Read more: Regarding the Use of Core Vias in a PCB Design