Features

Fabrication-aware simulations to aid PCB design success.

As engineers design printed circuit boards (PCBs) to operate at higher data rates, the system’s signal integrity becomes increasingly sensitive to the variation in the fabrication process. A practical design is a software-defined design that includes realistic fabrication variation.

Typically, the PCB material properties in electronic design automation (EDA) software have default values. These ideal values for the material properties and PCB cross-sectional geometry are often called the as-designed values. On the other hand, after fabrication, the as-fabricated properties are the measurable numbers and dimensions from a physical board.

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Higher layer count boards with mechanically drilled blind or buried vias may be built separately, then laminated together.

Sequential lamination is a fundamental manufacturing technique in an era of modern PCB fabrication and is a concept that must be especially understood when manufacturing high-density interconnect (HDI) PCBs with blind and buried vias.

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Consider return loss and insertion loss – but don’t stop there.

Material selection for high-speed printed circuit board design is one of the most common instances where a PCB becomes overengineered. Many of the high-speed PCB design guidelines available on the internet provide generalized recommendations and suggest advanced materials that may not always be necessary for digital systems. In fact, many high-speed PCB products are manufactured using less advanced, moderate-loss FR-4 material.

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Front-end analysis can help estimate the proper hatch opening – if any – for a flex PCB.

Flex PCB and rigid-flex PCB designers are aware of the typical lack of ground planes in a flex design. Due to this and the obvious requirement of ground planes in high-speed PCBs and RF PCBs, one may think that flex PCBs cannot support high-speed digital signals. However, even with a mesh or hatched ground plane, it is possible to design systems that include high-speed signals, both single-ended and differential.

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How and why to achieve higher-density placement and routing.

PCB pin count and interconnect densities are increasing almost daily. Due to the associated high frequencies and speed, not only are impedance matching constraints challenging, but timing is also becoming more important. To add fuel to the fire, the size of the PCBs is getting smaller. Techniques are needed to create space and routing channels on these smaller PCBs. On one end, designers are under considerable pressure to create a design that can meet all the target functionalities. Conversely, PCB manufacturers are facing similar challenges in developing fabrication and assembly processes that can guarantee a reliable product with minimum tolerances.

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Are your PCB supplier’s security measures up to par?

In today’s interconnected digital landscape, safeguarding sensitive information is not just a priority – it’s a necessity. For businesses engaged with US government contracts, compliance with cybersecurity standards is essential to protect controlled unclassified information (CUI). One critical framework for ensuring this is the National Institute of Standards and Technology (NIST) Special Publication 800-171, which outlines security requirements for protecting CUI within non-federal systems and organizations.

Compliance with NIST 800-171 is increasingly significant for PCB manufacturers, as the electronics industry often intersects with sensitive defense, aerospace and other government-related sectors. Understanding the framework and its implications is vital for PCB manufacturers, as it ensures they can protect their customers’ sensitive data, meet federal standards and maintain their reputation as trusted suppliers in critical industries.

Likewise, for PCB buyers, ensuring manufacturing and assembly partners comply with these cybersecurity guidelines is critical – whether it’s a government contract or not.

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