Features

Numerical analysis of defects in single bit and single symbol response. 

Modeling and measuring digital serial interconnects is usually done in the frequency domain. That means the minimal and maximal frequencies (or bandwidth) should be defined before analysis or measurement begins. The data rate and rise time define the signal bandwidth, and the usual practice is to define the maximal frequency as either the inverse of the rise/fall time (or fraction of it) or as a multiple of the fundamental or Nyquist frequency.1 Such a simple bandwidth definition may work for some structures, but it may fail for others. Ultimately, an SI engineer must make the decision for a particular signal type and interconnect structure.1

Here we introduce a simple, practical way to identify the bandwidth with a numerical analysis of defects in a single bit (SBR) or single symbol response (SSR). It begins with a brief introduction into structure and spectrum for 6Gbps and 112Gbps signals. Then, it proceeds with analysis of defects in SBR and SSR introduced by the bandwidth deficiency for two practical cases. The bandwidth is defined by a model with an acceptable level of defects in either SBR or SSR.

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Embedded passives are being deployed for commercial market applications. 

Recent advancements in mobile technologies have exponentially increased demand for radio spectrum bandwidth. The rush of equipment for more RF applications is being deployed across the world, with 5G and millimeter wave (mmWave) communications expanding into the commercial space to take advantage of the wider bandwidth, higher data rates and low latency that these frequency bands offer. Cellular 5G and 6G, low Earth orbit (LEO), mid Earth orbit (MEO), geosynchronous communications networks, interconnected devices (internet of things), autonomous driving vehicles, defense and environmental monitoring are all driving these needs. The antenna and sensors necessary to manage the signals for these applications are similarly changing, becoming more sophisticated.

To ensure high-data-rate wireless connectivity, the broadband high-gain antennas necessary to manage high-frequency but lower-power signals are increasingly moving from dish and horn to flat-panel active electronically steered antennas (AESA) for beam forming and massive MIMO designs. In response, the RF industry has developed new integrated circuits, materials, processes and equipment to build devices to manage these mission-critical sensor applications.

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To keep a good high-speed signal quality from driver to receiver on a PCB is not an easy task for designers.

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Reducing signal degradation requires dielectrics with lower Dk and LT, more metal and conductors without rough surfaces.

At a trade show a few years ago, our Simberian booth was next to a booth with a very loud demonstration transferring 112Gbps over a distance of about one meter through cables. I don’t know how many terabytes of data they transferred during the show, but the demonstration equipment was noisy because of the industrial cooling equipment. I could feel the heat coming out of it. The devices were transferring data and not much else. How much energy is required to transmit data, and why is so much power dissipated into heat, I wondered.

PCB interconnects degrade digital signals. Signals may be reflected, coupled to other interconnects, or to power distribution structures or free space, but most important, conductors and dielectrics always absorb the signal energy and dissipate or turn it into heat. This article is about signal degradation due to the inevitable absorption and dispersion caused by dielectrics and conductors. How much energy does it take to transmit one bit of information, and where does this energy eventually go?

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With recycling efforts well below international targets, will manufacturers be forced to adapt again?

Environmental issues have been front and center in electronics for decades. Most engineers today remember when the Restriction of the Use of Hazardous Substances in Electronics (RoHS) first went into effect in July 2006.

Michael Kirschner is president of Design Chain Associates, where he helps manufacturers understand and ensure their products comply with health and environmental regulatory, customer and market requirements. He has broad expertise in areas including semiconductor quality and reliability, software design and development, hardware design, development, and manufacturing, as well as manufacturing processes and supplier/supply base management.

This background enables him to help manufacturers assess and improve supply chain risk, readiness and performance, and achieve compliance with REACH, RoHS, Circular Economy, EcoDesign, CEAP, WEEE and other related health, environmental and social regulations.

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The annual trade show was slow by historical standards but attendees were pleased to be there. 

The annual IPC Apex Expo trade show, traditionally the largest assembly show in the US, was more “expo” than “apex” when it resumed as a live event in San Diego in late January. Traffic was certainly lower than typical, and notably quiet at times. See what Covid hath wrought.

Several suppliers decided not to bring equipment. Some others cut back on the number of machines they brought. Many exhibitors reduced their employee headcount as well, leaving those East of the Mississippi at home and counting on their West Coast staff to carry the load.

Apex remains primarily an assembly equipment and materials trade show. The message from several SMT line vendors is Covid has led to diversification to North America from China, as companies can’t afford long lead times and face pressure to keep the IP of sensitive products in the West. 

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