Models for predicting the effects of signal-destroying reflections.

An ideal digital interconnect is a lossless transmission line with characteristic impedance and phase delay flat over the signal bandwidth and termination resistors equal to the characteristic impedance. In such interconnect, bits generated by a transmitter would flow seamlessly into the receiver with no limits on the bit rate. Such a utopian transmission line exists only in our imagination – and in textbooks. The physics of our world prohibits that. One way to describe "what happens to the signal on the way to a receiver" is to use the balance of power that can be written for the passive interconnect as follows:

P_out = P_in - P_absorbed - P_reflected - P_leaked + P_coupled

The actual phosphorus content in the deposit must be considered.

While the current focus in the electronics industry is chips, components and microelectronics, the printed wiring board (PWB) also plays a vital role. Continued miniaturization and environmental considerations, such Restriction of Hazardous Substances Directives (RoHS), have led the industry to create and improve surface finishes to meet current and future generations of electronic assemblies. Two PWB finishes have become very common: ENIG and ENEPIG. The industry trade association, IPC, released IPC-4552 in 2002¹ to help standardize the global printed circuit board industry around a specification for ENIG. IPC-4556 was released in 2013² to establish industry standards around ENEPIG surface finishes.

Following its acquisition of ACI, APCT head Steve Robinson is bullish on what's ahead.

APCT in February completed the acquisition of Advanced Circuits Inc. (ACI), a printed circuit board fabricator based in Aurora, CO, and with facilities in Chandler, AZ, and Maple Grove, MN. The acquisition nearly doubles APCT's annual revenue to $200 million, and makes the company the third largest among PCB fabricators in North America behind TTM and Summit Interconnect.

In March, Steve Robinson, president and CEO of APCT, joined PCEA president Mike Buetow on the PCB Chat podcast to discuss the acquisition, the pending integration, and APCT's new responsibilities as one of the largest North American PCB fabricators. This transcript has been lightly edited for grammar and context.

Not enough solder? Blame the via design!

Vias in pads can be “solder thirsty” and suck up solder from pads at terminals during reflow, creating what may appear to be solder insufficiency at the joints. This problem is typical of a via-in-pad design. It’s unpredictable as well; solder will randomly tend to fill those vias during the reflow process and some locations may appear worse than others, for example.