Features

Adding thermal vias can take up valuable board space with little benefit.

We have developed several articles and publications in the past questioning the value of thermal vias.1 Here is our definitive conclusion, and why.

Thermal vias are non-current-carrying vias between two layers provided for the purpose of permitting heat to conduct from one layer in a PCB to another. The idea is to lower the temperature of the heated surface compared to another, lower temperature surface. In a typical application, the heated surface might be a pad underneath a heated component. The opposite surface might be another pad or plane further down in the PCB structure. Someone untrained in heat transfer might suggest using thermal vias without an opposite copper surface, but we will show that such an approach is totally ineffective.

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Building and maintaining what's said to be the world's largest CAD database requires strong relationships.

Keeping up with the increasing demand for new and specialized components is no easy task, but Ultra Librarian's team has proven up to the task – to the tune of more than 16 million components in its library and a quarter of a million unique downloads per month.

When we visited Ultra Librarian's office in Huntsville, AL, in early December, EMA Design Automation had just announced the library service's spinoff into a new ECAD-oriented company, Accelerated Designs, which was the original name of the company under its founder, Frank Frank, before it was acquired by EMA in 2016.

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Coating traces or filling vias is usually a wasted expense.

We are often dismayed by the number of individuals (and especially board manufacturers) who suggest that coating a trace or filling a via cavity can result in significant thermal and/or electrical conductivity improvements. Herein we will try to explain why, in almost all cases, this is not true.

Individual trace coatings. Often users (especially board manufacturers) suggest trace thermal or electrical conductivity can be improved by coating the trace with some conducting material. It sort of makes intuitive sense that additional material can provide more benefit. Trace coatings are typically limited in a practical sense to plated copper or a solder coat. We suggest that such a coating can be analyzed by looking at the separate elements (bare trace and coating) as two parallel conductors.

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Models for understanding sources, quantification and mitigation of crosstalk.

Crosstalk in PCB and packaging interconnects is arguably one of the most complicated phenomena that may cause signal degradation. It is caused by unwanted coupling between signal links and between signal links and power distribution systems. The effect is deterministic, but very difficult to predict in many cases – too many variables and uncertainties. Crosstalk effects can be treated statistically as a deterministic jitter with a bounded distribution, but the distribution is usually not known and just guessed.

A direct analysis of a worst-case crosstalk scenario may lead to a system overdesign. Neglecting it in design may cause a system failure that is difficult to find and fix later in a design process. On top of that, distortions caused by crosstalk cannot be corrected by signal conditioning techniques at the receiver side. Thus, it is very important to understand the sources of crosstalk, how to quantify it and how to mitigate it efficiently. This is the first part of the paper with an overview of crosstalk sources and terminology – just a slice through the complicated phenomenon. The second part will describe and compare different ways to quantify, compute and measure crosstalk. This paper continues the "How Interconnects Work" series.1-4

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Design and manufacturing considerations for HDI PCBs.

High-density interconnect (HDI) technology has been a major enabler of advancement in the electronics industry, providing the dense interconnections and intricate circuitry needed to create state-of-the-art electronic devices that are tightly packed with miniaturized components and 2.5-D/3-D semiconductor packages.

Miniaturization at the semiconductor level has driven miniaturization at the PCB level, with manufacturers striving to shrink the size of devices while maintaining or enhancing their capabilities. This has led to the development of compact smartphones, slim laptops, and wearable gadgets that seamlessly blend into our daily lives (Figure 1). Alongside miniaturization has been a constant push for faster processing speeds. As technology evolves, the processing power of electronic devices has skyrocketed, enabling quicker data processing, seamless multitasking, and smoother user experiences.

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EMA founder Manny Marcano lays out his strategy for untethering methodology and technology.

EMA Design Automation has for years been exclusive distributor of Cadence’s OrCad products in North America and Europe. Through acquisitions and internal development EMA now has a series of its own software products for library management, component supply chain data, and other areas.

Late last year EMA announced it would spin off those CAD-agnostic products into a standalone company.

We spoke in January with Manny Marcano, president and founder of EMA, on the PCB Chat podcast. The following transcript has been edited for clarity.

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