Consider return loss and insertion loss – but don’t stop there.
Material selection for high-speed printed circuit board design is one of the most common instances where a PCB becomes overengineered. Many of the high-speed PCB design guidelines available on the internet provide generalized recommendations and suggest advanced materials that may not always be necessary for digital systems. In fact, many high-speed PCB products are manufactured using less advanced, moderate-loss FR-4 material.
Advanced materials, such as Megtron or PTFE-based materials, might be encountered in commercial products. These material sets become necessary when channel bandwidth requirements extend into the GHz frequency range. The required operating frequency range and available material thicknesses are two of the most significant factors influencing high-speed PCB material selection. The following will help with understanding these materials and matching them to different digital interfaces.
Matching High-Speed PCB Materials by Frequency
High-speed PCBs are characterized by the edge rates of signals propagating in the design and the bandwidth of physical channels used to transmit those signals. Digital interfaces in high-speed PCBs require channels to have a minimum bandwidth to transfer enough power in a signal between the driver and receiver sides of a digital interface. Because all PCB materials exhibit some absorption (insertion loss) and conductor losses, these materials ultimately limit the available channel bandwidth.
When selecting materials for high-speed PCBs, the role of the PCB designer is twofold:
- Select materials that can support the channel bandwidth an interface needs to operate
- Arrange PCB materials in the stackup so that planes and signals are clearly defined in each layer.
Figure 1. High-speed PCB stackups should be designed with alternating signal layer formats.
The second point is often easier, as the rules for constructing stackups for high-speed PCBs are straightforward. Alternating plane and signal layers, with many designs requiring a dedicated power layer, ensures both signal integrity and power integrity.
Choosing Dielectrics for Signal Layers
But which dielectrics should be used to support the signal layers? Most design guidelines simply recommend low-Dk PTFE-based material (commonly Rogers) or another low-Dk material without specifying a particular product.
What matters is using low-loss tangent material. It just so happens that commercially available PCB laminate materials with low Dk values tend to also have low loss tangent values. This combination helps minimize insertion loss during signal propagation. When the loss tangent (Df) is sufficiently low, the dominant insertion loss mechanism shifts to copper loss.
Table 1 illustrates typical channel bandwidth ranges supported by various material sets for some common interfaces. The channel bandwidth requirement numbers are given as values before PCB materials become limited by copper and dielectric losses.
Table 1. Typical Channel Bandwidth Ranges, by Material
A Universal ‘Best’ Material?
Clearly, no single material is best for every high-speed PCB design. Different interfaces and protocols have different bandwidth requirements. Higher channel bandwidths typically demand:
- Lower loss tangent
- Smoother copper
- Minimal variation in Dk across the channel bandwidth
Knowing the required channel bandwidth is the first step in selecting PCB materials for a high-speed design. Many designers rely on guidance from application notes, reference designs or prior successful designs. Development boards can be highly useful as they provide a baseline, working design with proven signal integrity.
To estimate the amount of loss one can accept in a physical channel, a good rule of thumb is to consider one of the following, at whichever frequency it appears first:
- Lowest frequency of -10dB return loss
- Lowest frequency of -3dB insertion loss for the target length of the route
While not the best metric for every design, this provides a rough estimate of the channel bandwidth a transmission line can support.
Differential Stripline Design Example
Consider the differential stripline design example shown in Figure 2. In this example, the total insertion loss per unit length has been calculated using Polar Instruments’ Si9000 software. This shows the geometric parameters and the causally extrapolated dielectric constant variation in frequency. Clearly, Dk shows some variation which we expect to show up in return and insertion loss.
Figure 2. Materials data (Dk = 4.2, Df = 0.02) and geometry/roughness information for Polar Instruments’ Si9000 differential transmission line calculation.
Figure 3 shows the insertion loss for the rough estimate as a dB/in. value multiplied by the length of the transmission line. Here, we have not accounted for any vias or landing pads from any components connecting to the stripline.
Figure 3. Insertion loss data for the differential transmission line.
For this sample stackup and differential stripline, suppose we want to ensure we can route up to 6". The insertion loss is -3dB at approximately 2.6 GHz. This means we could use up to 6"-long routes for any interface requiring up to 2.6GHz channel bandwidth. If the interface required more than 2.6GHz bandwidth, we could do any of the following:
- Shorten the route, which will permit more power at higher frequencies to reach the receiver
- Modify the trace design for lower loss, such as routing with microstrips
- Use a dielectric material with a lower loss tangent
- Use smoother copper foil, if compatible with the material set and PCB stackup fabrication process.
By simply swapping to an ultra-low loss laminate (Df = 0.002), the insertion-loss limited bandwidth for a 6" route is approximately 5.7GHz. I’ll leave it for readers to consider how to continue extending the bandwidth further.
What about Return Loss?
Return loss is an important aspect because the estimate cited for insertion loss limiting the bandwidth assumes the impedance matching is perfect throughout the entire channel bandwidth. Obviously, if the dielectric constants show significant variation, then this cannot be the case. Therefore, variations in impedance matching also determine the level of loss in the interconnect and can limit the bandwidth.
If we look again at the differential stripline example above and plot the return loss, we can see the impedance matching is very good at low frequencies (Figure 4). At higher frequencies, however, the return loss eventually hits the -10dB limit.
Figure 4. Return loss data for our differential transmission line.
Here, it should be quite clear that return loss can also be a bandwidth limiter; the channel bandwidth is effectively limited by the lower of the -10dB return loss frequency or the -3dB insertion loss frequency.
Evaluate Channels in Post-Layout Simulations
To verify that the material selected is appropriate for a given interface, post-layout simulation work will be needed. Once the layout is finished, the channels in question should be simulated to verify that nothing in the channel creates additional limitations on the channel bandwidth. The most common bandwidth limiters in high-speed PCB design with multi-Gbps channels are vias and pads on components. We used Simbeor for these simulations.
Figure 5. Post-layout impedance simulation of a DDR bus in Simbeor.
True channel compliance for a particular interface cannot be determined just by looking at return loss and insertion loss. Other metrics might be needed, particularly for differential channels. This could include TDR (time-domain reflectometry) measurements, mode conversion plots, eye diagrams and crosstalk simulations or measurements where applicable. Evaluating the best material for a high-speed design is not just about focusing on the material; it is about assessing the completed routing once the PCB layout is finished.
Ed.: This article is republished with permission. from the author’s website. See the original here.
Zachariah Peterson has an extensive technical background in academia and industry. He runs Northwest Engineering Solutions (nwengineeringllc.com), a PCB design and technical marketing firm that serves industrial automation, defense and EDA software clients; This email address is being protected from spambots. You need JavaScript enabled to view it.. He is speaking at PCB East in April.
