Printed Circuit Design & Fab Online Magazine - Current Issue

Current Issue

Bill Hargin

The relative permittivity for FR-4 is just that: relative.

Ed.: This is Part 3 of a three-part series on preparing for next-generation loss requirements.

Last month, in Part 2 of this series, I outlined the means by which insertion-loss requirements are determined. Here, I’ll suggest a better method for obtaining accurate Df numbers without having to go to the trouble of building test boards.

A longtime PCB industry technologist asked me recently, “What’s a good Dk (dielectric constant) number for FR-4?” As the interest in signal integrity (SI) was growing roughly 25 years ago, it started to interest me that many SI practitioners considered FR-4 to have monolithic properties. The question reinforced that some still hold that view. One might say the relative permittivity (ϵ_r) of FR-4 is 4.3. Someone else would say 4.1. A third says they always use 4.0. As I read up on it, I realized it varies with frequency, resin content (as a percentage, with the inverse being the glass percentage), and the resin system. At lower frequencies, static numbers for vanilla FR-4 were probably fine for impedance calculations and signal integrity, but those days are far behind us at this point.

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Bill Hargin

Can signal-integrity test vehicle results be accurately simulated?

Ed.: This is Part 2 of a three-part series on preparing for next-generation loss requirements.

Here in Part 2 of the series, I’ll outline the means by which insertion-loss requirements are determined. In Part 3, I’ll suggest a better method for obtaining more accurate Df numbers without having to go to the trouble of building test boards.

As I stated in last month’s column, if you want to stay on top of the parameters that contribute to loss, there are a lot of factors to juggle. Frequency, copper weight, resin system, glass characteristics, dielectric thickness, trace width, copper roughness, and fabricator processing all contribute to the discussion if you’re savvy, driving fast, with both eyes open.

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Bill Hargin

Can signal-integrity test vehicle results be accurately simulated?

Ed.: This is Part 1 of a three-part series on preparing for next-generation loss requirements.

There are a lot of factors to juggle to stay on top of the parameters that contribute to loss. Frequency, copper weight, resin system, glass characteristics, dielectric thickness, trace width, copper roughness, and fabricator processing all contribute to the discussion if you’re savvy and driving fast, with both eyes open.

If frequencies aren’t increasing, no need to worry. But if your windows are getting chopped in half year-over-year, read on.

Background. Several years ago, I marketed laminates for servers. Older generations bumped up frequencies incrementally, but then we ended up dealing with frequencies that doubled from one generation to another, with downward pressure on costs.

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Bill Hargin

At higher speeds, the micro-environment around traces can alter simulation results.

In the past few weeks, e-mails from multiple sources crossed my inbox asking about the relationship between epoxy resin and signal behavior. With a couple of SI guys on one side and a career PCB manufacturing guy on the other side hitting me the same week with different versions of the same question, I thought it would make for an interesting column topic.

FIGURE 1 shows the initial image I was provided, along with the question what surrounds a typical trace? At face value, this may sound trivial, but it’s a reasonable issue for a signal-integrity practitioner to be concerned about.

Read more: What Surrounds a Typical Trace?