PARTS PLANNING
Optimizing Component Selection by Connecting the Designer to the Supply Chain
A new generation of connected design platforms, called engineering data management (EDM) systems, addresses issues of extended product development cycles by continually synchronizing supply-chain information with PCB design libraries, and alerting engineers to changes and conflicts.
by Bob Potock
DfX
PCB Designers Hold Smart Factories Ransom
Many companies have ended up “just living with” multiple, repeated PCB fabrication and assembly issues for years, regarding them as a given. If smart factories are to work, however, this has to change. Here’s how..
by Michael Ford
ADDITIVE PROCESSING
Savings and Efficiencies with Printed Silver Flexible Circuits
Historically, a designer’s only recourse as electronics packaging became denser was to incorporate flexible PCBs to route traces around 3D structures. Innovations in printing and component attach are seeing light, flexible printed silver circuitry in high-density applications where more costly traditional etched copper circuits were once exclusive.
by Greg Kuchuris
CAVEAT LECTOR
The PCB tool continuum.
Mike Buetow
ROI
Measuring customer service.
Peter Bigelow
DfM
Managing Rule Checks
The DfM validation challenge has increased over the past decade, thanks to the proliferation of new technologies such as flex boards, rigid-flex, chip-on-board, embedded components, and others. A new generation of design for manufacturing tools makes it possible to validate the design against design rules of all technologies and manufacturers that will be involved with the product in the early stages of the product development process.
by Humair Mandavia
SIMULATION
Algorithm for Constructing the Transient Process in a Meander Delay Line in PCBs
A graphic-analytical method for simulation of the transient process, as described by the authors, allows users to identify the basic mechanisms of pulse distortion in a meander delay line, and obtain the analytical dependencies for calculation of the efficient delay of signals at any predetermined level of receiver.
by S.A. Sorokin, Ph.D. and S.M. Chudinov, Ph.D.
EMS TOP 50
Automotive and Automation
In a year of stalled outsourcing – even mighty Foxconn took a step back – two sectors continued to drive EMS forward. Who were 2016’s individual winners and losers?
by Mike Buetow
CAVEAT LECTOR
Acquiring minds.
Mike Buetow
ROI
Doom and boom.
Peter Bigelow
FO-WLP
Is Fan-out Wafer-level Packaging Right for Your Product?
FO-WLP offers the ability to support more I/O, a smaller vertical footprint, cost reduction by eliminating the interposer, and improvements in electrical and thermal performance. But achieving these advantages requires overcoming some significant challenges.
by Narayanan (TV) Terizhandur
ADDITIVE PROCESSING
Semi-Additive Process for Low Loss Buildup Material in High-Frequency Signal Transmission Substrates
To decrease signal loss and increase signal integrity at a high transmission speed, the surface of dielectric materials should be very smooth, with excellent adhesion between them and fine-line circuitry. A novel material promotes signal integrity at high frequencies through high plating-resin adhesion and a smooth dielectric interface.
by Fei Peng, Ph.D., Naomi Ando, Roger Bernards and Bill Decesare
CAVEAT LECTOR
Careful what you wish for.
Mike Buetow
ROI
Keep up with the data.
Peter Bigelow
NOISE CONTROL
Voltage Drops across Traces and Vias
With today’s low impedance circuits, voltage drops may introduce an unacceptable amount of noise or signal level uncertainty into a circuit, leading some designers to avoid the use of vias on boards altogether. How to predict the
voltage drop across a trace, and why the voltage drop across a via is almost negligible by comparison.
by Douglas Brooks, Ph.D., Norocel Codreanu, Ph.D., and Dr. Johannes Adam
IPC APEX RECAP
Reinvigorated in San Diego
The annual IPC trade show captured a brighter industry mood, with plenty of activity for assemblers and – for a change – fabricators.
by Mike Buetow
CAVEAT LECTOR
America, don’t hold your breath for Foxconn.
Mike Buetow
ROI
When to buy.
Peter Bigelow
COMPLANARITY
Understanding PCB Design Variables that Contribute to Warpage during Module-Carrier Attachment
In an effort to improve attachment yield rates of a module to a carrier board, a design of experiment evaluated several PCB design variables believed to contribute to warpage during reflow. The objective was to isolate key design parameters that contribute most to the attachment problems. Shadow moiré was used to provide accurate warpage profiles of the six-up module arrays before and after top- and bottom-side assembly, and again before and after attachment to the carrier board.
by Donald Adams, Todd MacFadden, Rafael Maradiaga and Ryan Curry
STANDARDS
Cost and Risk Reductions Using the IPC Traceability Standard
Many see traceability as a burden to the manufacturing process, and having to comply or conform to yet another process or standard is not considered a good day in the office or factory. IPC-1782 removes such headaches.
by Michael Ford
CAVEAT LECTOR
Why the industry is looking up.
Mike Buetow
ROI
Driven to distraction.
Peter Bigelow
THERMAL MANAGEMENT
Thermal Effects around Right-Angle Trace Corners
Should designs use 90o corners, or is the risk of increased current density – and its concurrent heat spike – too great? A study of thermal gradients around the corners on a PCB.
by Douglas Brooks, Ph.D., Norocel Codreanu, Ph.D., and Dr. Johannes Adam
CONNECTORS
Creating Robust, Durable Overlap ZIF Connections in 4 Steps
Similar to card-edge connectors, zero insertion force connectors are popular but easy to damage during insertion. Robust design goes beyond simply lining up edges on top of each other.
by John Talbot
CAVEAT LECTOR
Overcertification is standard fare.
Mike Buetow
ROI
Shades of 1933?
Peter Bigelow