2017 Magazine Archives

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FEATURES

FO-WLP
Is Fan-out Wafer-level Packaging Right for Your Product?
FO-WLP offers the ability to support more I/O, a smaller vertical footprint, cost reduction by eliminating the interposer, and improvements in electrical and thermal performance. But achieving these advantages requires overcoming some significant challenges.
by Narayanan (TV) Terizhandur

ADDITIVE PROCESSING
Semi-Additive Process for Low Loss Buildup Material in High-Frequency Signal Transmission Substrates
To decrease signal loss and increase signal integrity at a high transmission speed, the surface of dielectric materials should be very smooth, with excellent adhesion between them and fine-line circuitry. A novel material promotes signal integrity at high frequencies through high plating-resin adhesion and a smooth dielectric interface.
by Fei Peng, Ph.D., Naomi Ando, Roger Bernards and Bill Decesare

FIRST PERSON

• CAVEAT LECTOR
  Careful what you wish for.
  Mike Buetow

MONEY MATTERS

• ROI
  Keep up with the data.
  Peter Bigelow
  

• FOCUS ON BUSINESS
  Coping with the (potential) border tax.
  Susan Mucha

TECH TALK

• DESIGNER’S NOTEBOOK
  Using buildup layers and premium FPGAs to deal with SI challenges.
  John Berrie
• THE FLEXPERTS
  When to use ZIF connectors.
  Mark Finstad
• TECH TIPS
  Halides present post-reflow can cause severe corrosion.
  ACI Technologies

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