A methodology for selecting the right material and the right price point.
When I started writing this column a couple years ago, I wondered how much I’d have to say. An experienced media guy told me to watch my inbox for topics and questions that may be of general interest. That turned out to be excellent advice. Here’s one such example.
“What is the best laminate for a loss budget of x dB for y inches? I was thinking in terms of Panasonic Megtron 6 or something like it.”
Megtron 6 is an excellent material, but it’s not cheap and it’s not the only horse in the race. My response was to focus on a loss and material-planning methodology rather than making a firm material recommendation.
Why we care. Everything that improves material performance – in particular, reductions in loss – comes at a price. Loss versus cost is a classic optimization problem. Designers want to pay just enough to meet loss requirements, but not more than they need to.
In the past, speeds were slow, layer counts were low, dielectric constants (aka Dk or Er) and loss tangents (aka dissipation factor, or Df) were high, design margins were wide, copper roughness didn’t matter, and glass-weave styles didn’t matter. We called dielectrics “FR-4,” and their properties didn’t matter much.
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Read more: Cutting Your Losses Upfront in PCB Design
The impedance implications of the trapezoidal trace.
Until recently I thought those who believed in rectangular traces were about as common as those who believe in square waves and a flat earth. Recently, though, I came to realize it’s not as clear as I thought, not only for newbies but in general. Over the past 25 years, I’ve acquired a good number of books on PCB design and signal integrity, and you wouldn’t know from reading most of the industry literature that traces were anything but rectangular. Interesting, right?
If you’ve read previous “Material Matters” columns, you may recognize the following cross-section from our Z-solver software. Among other things, it shows that the base of a trace, facing the core dielectric, is wider than the side of the trace that faces the prepreg. As such, the trace trapezoids face both up and down in a multilayer stackup. There’s no relationship to the layer number or whether the trace is on the top or bottom half of the board. For this reason, some including me – but not everyone – avoid using terms like “top” or “bottom” with regard to trapezoidal traces.
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Weight is still used as a determinant for copper thickness. Why?
Sometimes my columns tie to issues or stackups that appear in my inbox each week. I’m occasionally asked why 0.6 mils (15µm) is often used for the thickness of 0.5-oz. copper, rather than 0.7 mils (18µm), and similarly why 1.2 mils (30µm) is often used for 1-oz. copper instead of 1.4 mils (36µm). If you’re curious about the details, or if none of these numbers seems familiar, here’s a quick primer. The thickness parameter “t” in FIGURE 1 shows the thickness we’re interested in here.
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Read more: Actual Copper Thicknesses (As Opposed to What You’ve Assumed)
Trace separation; length parallelism; stackup: Does one stand out?
It’s been some time since I’ve seen an article on crosstalk, so I decided to take the opportunity to walk through the subject in a soup-to-nuts overview for those in the PCB design community who may be interested in why crosstalk-savvy PCB designers and hardware engineers use various design rules for controlling crosstalk. In the process of doing so, we’ll identify which design tweaks provide the most leverage for controlling far-end crosstalk.
Crosstalk is unwanted noise generated between signals. It occurs when two or more nets on a PCB are coupled to each other electromagnetically, (even though conductively they are not connected at all). Such coupling can arise any time two nets run next to each other for any significant length. When a signal is driven on one of the lines, the electric and magnetic fields it generates cause an unexpected signal to also appear on the nearby line, as shown in FIGURE 1.
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