New Products

Vishay Intertechnology Inc. introduces the 146 RTI series of radial aluminum capacitors. Available in 13 case sizes, the capacitors offer 2500 hours to 6000 hours of life at +125° C.
 
Features include: a ripple current of 3200 mA at +125° C; impedance as low as 18 milliohm at 100 kHZ; and a capacitance range from 68 microfarad to 6800 microfarad over a voltage range of 16 V to 63 V.
 
The capacitors are RoHS-compliant, as well as charge- and discharge-proof.
 

INTEGRATED Engineering Software introduces ELECTRO 2D v7.0. The 2D/RS electric field solver software allows engineers to simulate transient problems, providing more energy efficient and safer designs.
 
Features include Material Manager, an enhancement that allows designers to select numerous material options during the prototyping stage and decide which work best. Custom material libraries can be created and shared with different models and subsequent designs.
 
The software calculates electric field strength, force, torque and transmission line parameters. Fine-tuning multiple design parameters is reduced because designers are able to automatically vary and experiment with geometry, materials and sources.
 
www.integratedsoft.com
Sigrity introduces Channel Designer that addresses the challenges associated with the development of high-speed serial links. Channel Designer offers the flexibility and accuracy required to predict bit error rates and ensure reliable operation at speeds that are approaching 10 gigahertz and beyond.  
 
Major Channel Designer Capabilities:
 
·         Unique channel design capture environment including a net-based, block-wise schematic editor for designs ranging from a single net interconnect to an entire bus traversing multiple boards.
·         Highest available simulation accuracy building on Sigrity’s expertise in S-parameter handling for accurate transient simulation for designs from DC to 10 gigahertz and more.
·         Incorporation of industry standard IBIS Algorithmic Modeling Interface (AMI) transmitter and receiver models plus unique capabilities such as cascaded model support to simplify the flow.
·         Quick identification of channel design boundaries with targeted equalization and clock data recovery (CDR) modeling to anticipate end-to-end serial link behavior.
·         Flexible reporting and visualization including 2D and 3D eye diagrams, along with bathtub curves, for accurate bit error rate (BER) prediction.

www.sigrity.com
 

Linear Technology Corp. introduces LTspice IV, an update to LTspice/Switcher CAD III SPICE circuit simulation software. It is a free download at www.linear.com/designtools/software.
 
Features include multi-thread solvers designed to utilize current multicore processors. Simulation speeds of medium- to large-sized circuits are increased by a factor of three on a quad core.
 
Integrated schematic capture and waveform viewing are included. This is a general-purpose SPICE program not artificially limited by component or node count.

DesignAdvance Systems, Inc. introduces CircuitPlan, a concept level planning tool for the hardware engineer. CircuitPlan offers planning, feasibility and design collaboration from concept level planning through physical design and test.

As a concept level planning tool, CircuitPlan supports full logical and physical hierarchy. CircuitPlan provides a mechanism to begin design by populating preliminary plans with design data, including mechanical, from previous and existing designs or reference boards (both partial or complete netlists).

Floor Planning and Conceptual Product Planning Capabilities include: 
--  Feasibility Analysis [multi-level fit studies]
--  Plan with generic or pseudo components and/or CircuitSpace templates
--  Concurrent syncing with schematic allows the user to replace generic or
    pseudo components with schematic completed components
--  View Functional and Physical Design encompassing inter-view
    connectivity
--  Populate your Design with data from previous designs and reference
    boards
--  Import/Export into IDF and/or leading PCB design flows
--  Placement Automation Capabilities
    - Interactive Clustering
    - Replication of exact/partial clusters
    - Modify and propagate changes
    - Apply templates

CircuitPlan v1.0 will be available in February 2009.


Aries Electronics introduces the CSP/BallNest Hybrid Socket for test or burn-in of chip scale package, ball grid array, microBGA, land grid array and prototyping.
 
It can be used on any device having a pitch of 0.30 mm or larger. Features include a lid that nests each ball termination into the socket for a reliable connection and a four-point crown providing scrub on solder oxides.
 
It has a signal path of 0.0777 inches and provides minimal signal loss for higher bandwidth capability. Estimated contact life is 500,000 cycles, and the socket is available in custom materials, sizes, configurations and platings.
 
www.arieselec.com

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