PA6.6 polymer combines characteristics of halogen-free flame retardancy with high flow and low migration, while reducing corrosion during the injection process. Reduces corrosion of injection machine during processing. Is UL Yellow Card certified, including 5VA flame class rating at 0.8mm thickness.
Integr8tor v2016.04 sales and engineering server for auto input and design analysis provides more detailed analysis of incoming client PCB design data, enabling evaluation, costing, pricing and quoting boards without the need for CAM workload. Resolves repetitive pre-CAM work on incoming jobs, cutting up to 25% of operating time per job. Extensive DfM Classes toolkit expands on former Capabilities suite to automatically and quickly provide a reliable, comprehensive, easy-to-read visual overview of the resources needed for incoming PCB designs. Depending on manufacturer priorities, DfM Classes typically classifies the PCB according to ease of manufacture, materials and resources necessary, and cost levels by accessing and analyzing all the QED data and classifying PCB designs with respect to a broad range of predetermined, custom production parameters. Shows where a layout can be optimized. Other improvements: more sophisticated surface mount device and BGA pad analysis and count; user-defined outlines that protect the integrity of peripheral tracks and features; automatic recognition of cut-outs; feature-specific analysis of clearances between objects and outlines; improved support for Eagle and mixed unit ODB++ v8 data sets; Windows 10-compatible; added speed and simplicity.
92ML thermally enhanced epoxy-based laminates and prepregs are for high-power applications. Are halogen-free, flame retardant, and thermally conductive. For multilayer applications requiring thermal management throughout the entire board. Come with up to 4oz. copper cladding. Thermal conductivity of up to 3.5 W/mK (in-plane); Tg of 160°C; Z-axis coefficient of thermal expansion of 22ppm/°C (<Tg) and 175ppm/C (>Tg), for lead-free solder exposure and board reliability testing. High degree of resin flow. In combination with an aluminum plate, will form an insulated metal substrate (92ML StaCool)
ModVIA plasma system is fully integrated and doubles its capacity from four to eight cells (eight to 16 panels) to accommodate manufacturing production growth. Compact design and small footprint. For treating printed circuit boards for desmear, etchback, and to provide surface activation. Accommodates a broad array of PCB panel technologies in various shapes and sizes including rigid, flexible, through-hole, and blind via, and works with a wide range of process gases such as Ar, O2, N2, and CF4. Nominally equipped with three electronic mass flow controllers (MFCs) for optimal control and delivery, the gas system can support a total of five MFCs. The temperature-controlled high flux electrode (HFE) design, custom control system, and advanced plasma cleaning technology are said to minimize CF4 usage and improve bonding performance. Chamber dimensions are 1652 (w) x 1747 (d) x 2445mm (h)(65 x 69 x 97"). Includes upgraded gas distribution and pump package, and improved user interface and control parameters. Chamber processes PCB panels in separate plasma cells to deliver high etch rates. Chassis houses plasma chamber (constructed of high-quality aluminum for superior durability), the control electronics, 40kHz RF generator, pump/blower package, and automatic matching network. Maintenance access available from either front or rear access panels. EH&S/Ergonomics compliant and CE marked.
Allegro 17.2-2016 PCB design platform features comprehensive in-design interlayer checking technology said to minimize design-check-redesign iterations and a new dynamic concurrent team design capability that accelerates product creation time by up to 50%. Utilizing material inlay fabrication techniques, these new capabilities reportedly can reduce material costs by up to 25%. Includes embedded Sigrity technology, to ensure critical signals meet performance criteria and power integrity (PI) for power delivery and IR-drop issues.
Capabilities include:
Rigid-flex design enhancements, to specify multiple rigid and flex stack-ups in the same database. Stack-up-by-zone feature can also be used in rigid designs to create material inlay regions leveraging a mix of expensive and inexpensive materials, enabling reduction of material cost by up to 25%.
Unique and comprehensive in-design inter-layer checks for flex and rigidflex that saves manual effort and ensures all rules for advance flex designs are adhered to, avoiding many design-check-redesign iterations.
PI for PCB designers that leverages Allegro and Sigrity technologies to provide faster, more reliable access to IR-drop analysis results, to efficiently meet power delivery network (PDN) design requirements.
Interoperable Allegro and Sigrity technologies that provide an easy to use environment, which shortens design and verification time. This is achieved by avoiding unnecessary physical prototype iterations through improved route channel utilization using tabbed routing, new in-design backdrilling rules and efficient sharing of custom return path via structures optimized with Sigrity technology.
New Native 3D engine that streamlines system design process and provides improved visualization and collision detection to avoid unnecessary MCAD/ECAD iterations.
Synchronous team design capability shorten design time by up to 50% for dense designs and increase efficiency by enabling the team to design synchronously. Allows up to five PCB designers to conduct real-time, concurrent PCB design work within the same design database, shortening time to route a dense design by up to 80%.
OrCAD 17.2-2016 PCB design software features new capabilities for OrCAD Capture, PSpice Designer and PCB Designer to address challenges with flex and rigid-flex design as well as mixed-signal simulation complexities in IoT, wearables and wireless mobile devices. Includes technology enabled for integrated rigid-flex planning, design and real-time visualization, as well as built-in translators that enable direct design imports from select EDA vendors. PSpice Designer now supports system-level simulation using C/C++/SystemC and VerilogA, via new PSpice compact model interface. Enables hardware/software virtual prototyping for design and simulation of intelligent IoT devices.
New multi-stack-up database capability and extensive in-design interlayer checks help avoid errors introduced through manual checking. Features enhancements targeted towards improving PCB editors’ productivity and ease-of-use in padstack editing, constraint management, shape editing and in-design DRCs. Includes an advanced design differencing engine that enables design review with global teams using state of art visuals. Advanced annotation and auto-referencing capabilities now available, for added control over design component annotation process.
