FEATURES

FPGA/PCB Co-Design
FPGA/PCB Co-Design Increases Fabrication Yields
When integrating FPGAs into PCB design every signal and pin has a measureable effect on production yield.
by Yan Killy

Optical Interconnect
Optoelectronics Comes of Age, Parts 1 and 2
Note: Part 1 ran in the February issue. Part 2 ran in the March issue. Both parts are presented here.
Optical connectivity is sufficiently advanced, has been reduced to practice and is available for many near term applications.
by Dr. Bruce L. Booth and Jack Fisher

Embedded Capacitance
Implementation of Buried Capacitance in High-Speed Designs
Embedded capacitance frees up the board surface for routing traces, can reduce the overall board size and can speed time to market.
by Jun Fan, Norm Smith, Jim Knighten, John Andresakis, Yoshi Fukawa and Mark Harvey

Innerlayer Processing
Improved Innerlayer Bonding for Sequential Lamination
Multiple lamination cycles add cumulative thermal stress to the innerlayer bonds.
by Dr. Jean Rasmussen, Dr. Abayomi I. Owei, Danis Isik, Dr. Axel Dombert, and David Ormerod

POINT OF VIEW

Our Line
The long view.
Kathy Nargi-Toth

ROI
Experienced people are an essential part of a corporate recession survival plan.
Peter Bigelow

EMC for the Real World
At higher frequencies signal loss and noise is reduced when ground-return vias are placed close to the signal vias.
Dr. Bruce Archambeault

Positive Plating
The best defense against voids is to understand the processes that can cause the defect.
Michael Carano

BGA Bulletin
Successful fanout solutions provide escape routing for a combination of serial and parallel nets.
Note: This column ran in four parts in the March, April, May and June issues. All four parts are included here.
Charles Pfeil

DEPARTMENTS

Ad Index

Off the Shelf

• Prev
• Next