When the CAD tool “understands” how other product design tools function, a better system is the result.
For the most part, modern electronics system design has included design of various components or the system in near isolation of each other. ICs were designed and pin-outs determined by position of circuitry on the chip. Package designers took the chip design that was “thrown over the wall” and did the best they could to design a package that kept bond wires short and kept the package as small as possible. Then, PCB designers, often swearing the whole time, took the packaged IC and figured out how to route signals that always seemed to be placed on the wrong pin or ball.
Increased complexity of SoCs and the growth in multi-die packaging have spurred attention to cross-domain collaboration among the IC, package substrate and PCB design groups. High-pin-count devices, coupled with cost sensitivity, have forced engineers to reconsider how they plan and optimize I/O placement on their chips, while making tradeoffs involving complex IC packaging variables – potentially, all while targeting multiple, different board-level platforms.
Cognitive design. To be most useful, EDA tools should be cognitively aware of the tools used in other processes. In the package and PCB design world, there has been little awareness of each other. True, FPGA pinouts can be defined to a limit by the customer, but “standard” parts have generally not offered this option.
By making tools aware of the design and processes used in other segments of product design, those tools are able to work together to produce a better system design in a much shorter time frame. Further, standard IC dies can be packaged in different ways, depending on the form factor of the end product to realize more optimal solutions for each.
A perfect example of how tools will soon be more cognizant of each other and work together to produce more optimal designs is the design of a smartphone and a tablet using the same CPU die. Obviously, many mobile device companies are doing precisely that. However, the available real estate on a tablet PCB will likely be significantly greater and have fewer constraints than a smartphone. So, a package for the CPU on a tablet may be larger, have different pinouts, or may be able to dissipate more power than the same CPU in a smart phone. Thus, a single “standard” package may not be the optimum package for either application (Figure 1).
Using new tools, designers now can take the die configuration and “look” at the design from either the perspective of the package and transfer to the PCB (the traditional method), or look at the requirements of the PCB design and work backward to the package design. And, they have the capability to take each product using that CPU and work backward from the PCB to the optimal package specifically for that design optimization.
From the packaging viewpoint, the physical design rules are written by the PCB design requirements. Then, the tool interactively works with the rules and the package designer to implement a package that is optimum for that particular application of the chip. This relatively quick method to design the package also allows exploration of different ideas to quickly find the optimum.
Figure 2 shows a hypothetical product design. In this case, the form factor of the final product is known, and preliminary placement of the components has been made. Note in the top illustration that placement of the CPU has been reserved. With this input, the tools can begin path finding, that is trying multiple package configurations based on the rules that both the PCB designer and the package designers have written.
With each design, a conditional routing can be made on the PCB to determine the best package and pinout. Rules allow designers to define such parameters as leaving corner pins unused, keeping differential pairs together, how to distribute power and ground, how to handle data and address busses, etc.
Once the rules have been written, it is not quite “push the button and sit back,” but it is straightforward and considerably quicker and more accurate than using spreadsheets and pin lists, which is the current status quo.
The advantages of tool-cognitive designs and being able to optimize a design in any of the design domains are significant. First, it becomes much easier to tailor multiple package designs to allow the optimum use of a given component in the required form factor. Designs can be looked at from multiple “what if” scenarios, such as smaller footprint, least cost, simplest breakout and exit, etc. Second, the sheer number of pins has simply overloaded the capability of constructing package designs using spreadsheets and pin lists. The chance of error is near 100% when humans are entering data for hundreds of pins. And, of course, the benefits of increased quality, optimum package for the form factor, and reduction of errors are multiplied by the time saved in the overall system design.
John Park is a product architect in Mentor Graphics’ Systems Design Division; This email address is being protected from spambots. You need JavaScript enabled to view it..
Reports say that Panasonic may exit the plasma TV business in the near future. Panasonic is the consumer electronics giant in Japan, but they are willing to leave the unprofitable plasma TV sector. In poker terms, this is a good fold. The company has lost billions in the TV business over the last few years.
Read more: Panasonic Plans to Exit Plasma TV Business
The Combined Exhibition of Advanced Technologies, also know as CEATEC, is Japan’s largest IT and electronics exhibition and conference. The five-day show was held at Makuhari Messe – a Japanese convention center outside of Tokyo. The show is held every year in October, and this year’s show completely changed from previous years’ as the electronics industry in Japan has dramatically slowed.
Read more: 4k TVs Abound but Vision Missing at CEATEC
A new online CAD library pairs specifications and social conversations in a dashboard-view of electronic components.
It was a little over 12 months ago that I first discussed SnapEDA with its founder, Natasha Baker.
At that time, Baker was about nine months removed from her job as a product marketing engineer at National Instruments. At NI, and at Analog Devices and Electronics Workbench before that, Baker worked on tools for printed circuit board simulation, modeling and land patterns.
Drawing from her experience, Baker saw an opportunity existed to capture what designers knew about components and how they perform electrically in real-world applications and redistribute that knowledge on a wide scale. And she wanted to do it via a vendor-agnostic platform and in a way that leveraged the best attributes of social media – the shared experiences – but in a highly targeted environment.
When we first talked, Baker, an electrical engineer, had the outline of her website and model in place and was busy learning programming to help put her vision into practice.
Fast forward to today, and Baker’s startup company, SnapEDA, has created a collaborative CAD library of schematic symbols, models and footprints. The platform goes considerably further than the seemingly ubiquitous crowd-sourced land pattern sites popping up all over the Web, however, branching into simulation models, and (hopefully, she adds) distributing semiconductor companies’ CAD libraries, simulation models and reference designs.
As with any user-generated and contributed library, there are risks, including bad data and IP infringement, intentional or otherwise. SnapEDA relies on its user community to vet everything that is shared. Users of the platform can download parts and vouch for their quality or flag problems.
Making the site vendor-neutral was a goal. Baker envisioned a platform based around the component itself, instead of being locked in to a particular tool. To that end, models and symbols can be exported to various software formats.
“Our overall goal is to be a comprehensive data source for everything someone might want to know about an electronic component, and a way to help them get started designing with that chip quickly, regardless of which design software they use,” Baker said. “So in addition to CAD libraries, we also provide datasheets and specifications, pricing and availability, and even questions and answers that have been asked about that component, all in the same view.”
Parts vetting. Users can share parts data by uploading them through SnapEDA, which has automation tools to simplify and speed the process. If a particular CAD part isn’t in SnapEDA’s database, the company has made it simple to request one from the community.
As part of the vetting process, the site indicates how many users have endorsed a component or model, and also how many users have flagged problems. Baker shied away from a star rating system, however, because its utility seemed vague. “What does it mean to give a part a rating of 3 stars? It’s a chip; either it’s right or wrong. It’s either a good CAD part or a bad part.”
Revealing exactly who has “vouched” for a part raises the authenticity of the endorsement. Moreover, the public stamp of approval implies the part has met their standards. Flagging, on the other hand, goes further than the traditional “thumbs down” vote, requiring the user to enter a particular issue they have identified with the part.
“If no one has endorsed the part, it is advised to proceed with caution and verify it against the datasheet,” Baker explains. “Down the line, we want to add more complexity to that, to provide rules on what makes a part good or bad.”
The data are free to use (and always will be, Baker adds). Down the road, SnapEDA envisions certain premium services, including a service for manufacturing and assembling prototypes. Crowd-sourcing is an easy way to get started, but Baker recognizes it as the first step in a longer process.
Of course, some designers are reluctant to upload parts data because their companies consider that their IP. Baker doesn’t see that as an issue, noting that the data regarding symbols aren’t proprietary. “A chip is a chip; a symbol is a symbol.”
An area of distinction is how Baker’s extensive experience with simulation and analysis tools comes into play. Users are encouraged to upload simulation models, which the community will also vet, and SnapEDA is engaging with semiconductor companies to distribute their CAD libraries, simulation models and reference designs. “It would be a trusted source of data on our side, and it’s a very targeted way for these companies to reach design engineers who are at the point where they are selecting products,” she says.
The networking side of the SnapEDA model is distinct from other sites as well. Baker set up SnapEDA as a full professional network, similar in some respects to LinkedIn in that each user has a unique profile that displays their professional credentials and specialties. As part of their “resume,” users can detail their specialization, for instance analog or digital design, or even more specific areas such as power supply design or high-speed PCB layout. They also can list the CAD tools they have expertise with. “This opens the doors for people to start having conversations at the design level,” Baker says. “It might be a message like, ‘I see that you are using the same CAD software as me. Do you know how to add a power pad to a footprint?’ or it could be a particular question about how to use a component in their design that another user of the site has used before.”
What users won’t do is vet each other. Instead, SnapEDA is focused on the components database, and using the social layer as a way to enable collaborative features around that database.
“The way we are implementing the community is around inciting conversations around parts. It’s not a community for general electronics; it’s targeted for designers,” Baker says. “It’s about, ‘I’m using this chip. I need to know how to use it, where to buy it from, and I’d like to download the libraries for my design so I can start designing immediately.’
“We have questions and answers on the site, but we direct people to ask questions around a particular electronic component that they’re using so as to direct the conversation in that sense.”
Certainly, countless technical conversations take place every day on various industry networking sites. But at no time has an effort been made to sort through, capture and make use of all those discussions. Yet SnapEDA is attempting to tackle just that. “The problem is if I’m on a forum and talking about a part, all that info is lost,” Baker says. “Maybe if you’re lucky someone will stumble upon it in a Google search, but otherwise all the information is scattered. But what if you could tie all that to the part to give users the context they need? That’s where the collaborative part really ties in. Then when someone else goes to look up information on a part – maybe a datasheet because they’re trying to troubleshoot a problem – they can see any other questions people have asked about it.
“Some, especially circuit board manufacturers that we have talked to, have been more hesitant to see the value in collaboration because they see how worried their customers are around the security of their designs, which is true and is a valid concern. But it blinds them to the fact that, on these forums, everyone is already helping each other, providing these very in depth technical solutions.”
SnapEDA had a soft rollout in September. The software currently supports Altium, OrCAD, PADS, Eagle, Zuken, NI Multisim and KiCAD. In terms of conversion, most parts visible on the site can be converted instantly to Eagle, OrCAD, Altium and KiCAD. Baker adds that SnapEDA is focused on expanding to other conversion tools as it develops the community and develops relationships with CAD vendors. “We also show renderings of the symbols and footprints before downloading, so that users can verify the integrity of the data before they download it,” she adds.
What else does SnapEDA have in store? In addition to expanding its conversion tools, Baker wants to add editing capabilities to the symbol and footprint viewer, a move that would allow users to, for example, add a missing pin.
The company also plans to introduce a designs section, and better tools to help users discover new products. While currently focused on aggregating all the available knowledge about certain components, the firm wants to eventually help users find the right parts. “Right now we have parametric search, but we have other plans for the future,” Baker says.
Her biggest obstacle, Baker says, hasn’t been product development or market acceptance, but rather the more basic problem of knowing how to program. As a novice coder, she taught herself Django (a python-based web framework) and some other web technologies. SnapEDA has since brought on additional programmers. Ironically, for someone who is building a crowd-sourced database, Baker sees knowing how to do it yourself as a competitive advantage. “A lot of people outsource coding, which is fine, but having the expertise in-house makes you more agile and is very important if you’re committed to growing as a technology company.”
Mike Buetow is editor in chief of PCD&F (pcdandf.com); This email address is being protected from spambots. You need JavaScript enabled to view it..
Eliminating hydrogen peroxide enhances safety. But what will the traces look like?
Printed circuit board conductors (traces) are formed via etching in a complex process involving a copper surface. This process traditionally uses hydrogen peroxide (H2O2). Hydrogen peroxide is an unstable oxidizing agent, with a large process window that has the potential for reoxidation. The chemical process of etching is difficult to control and does not meet the requirements for fine homogeneous structures. Furthermore, hydrogen peroxide is hazardous and increases the risk of fire.
An alternative technology uses ozone instead of hydrogen peroxide as an oxidizing agent. This technology involves a closed-loop (bypass) process installed into the production line. The amount of ozone produced is in the grams or even milligrams range. Excess ozone is converted and output as oxygen into the air. Because the amount of ozone used is miniscule, the volume is acceptable even under the most stringent international guidelines.
Conventional technology (e.g., phosphate esters) used for oxidation involves stabilized hydrogen peroxide. Regeneration of the etching solution is performed largely in the machine itself or in a central tank system. The applied etching solution must be renewed by the spray. An exchange in the diffusion layer becomes increasingly problematic for finer structures.
The nonuniformity of the solution itself, coupled with electrolyte replacement in the diffusion layer, tends to produce an undesirable undercut. This etching is such that, for the finest structures, the minimum photoresist does not provide a sufficient etch channel.
The novel technology completely substitutes ozone for hydrogen peroxide. This eliminates storage and handling of a dangerous substance. Ozone obtained from the ambient air is introduced through an injector and the novel reactor in situ in the process. Etchant is sprayed on the panel via patented pulse stream nozzles. The mixture is separately introduced. The regenerated CuCl is already in the diffusion layer of the etch channel. The etching process on the whole operates about 30% faster. Etching is drastically minimized, resulting in steeper sidewalls and finer structures (<20µm). The uniform concentration of the solution and the (patented) pulsating pulse stream nozzles aid the consistency and quality of traces on the entire panel.
Other results noted are the smoother surface structure of the interconnects and exact edge profiles along the trace (Figure 1). This leads to a considerable increase in impedance.
[Ed.: To enlarge the figure, right-click on it, then click View Image, then left-click on the figure.]
Figure 1 shows cross-sections of two etched copper structures. The sample with hydrogen peroxide (left) shows cone-shaped sidewalls. In contrast, the novel technology produces nearly vertical sidewalls. The sample produced with hydrogen peroxide shows significantly more blurred edges, and the surface is rougher compared to the sample produced using the novel technology.
The novel ozone technology also narrows the process window by up to two-thirds compared to conventional hydrogen peroxide (Figure 2).
Marcus Lang is technical director and CTO of AKON GmbH; This email address is being protected from spambots. You need JavaScript enabled to view it..
For thermal management, how does FPC compare to rigid material?
Mobile devices are a modern computing marvel. What once filled an entire room now fits in a shirt pocket and is an indispensable convenience, with enough processing power to browse the Internet, send/receive email, watch a movie, listen to a favorite song, provide location guidance, and even (on a rare occasion) make a call. Computers in your pocket: Who would have believed it 20 years ago, when a PC needed a sturdy desk and a huge noisy fan to keep the processor cool?
The size may have changed dramatically, but heat management issues remain the same. Indeed, they may be exacerbated in that the device form factor does not permit an integrated fan to cool the device. There are common techniques to manage heat within a device applicable to both rigid and flexible printed circuits, such as adding a metal heatsink on the components, thermal vias to transfer heat from the component side of the board to the opposite side, and thermal grease to facilitate heat transfer from the board to an external frame. But what about the boards themselves? Are there significant differences in thermal management between FPC and rigid?
Today’s mobile devices have no room for heatsinks on computers, no room for airflow between components, and no designing out of high-performance components that generate large amounts of heat. What we are left with is a thin, highly-populated device that generates heat that needs to be distributed over large areas to eliminate “hot spots” that are discomforting to users and detrimental to device performance. How do ultra-thin devices manage this heat, and how are FPCs used to accomplish this? Does the migration to FPC come at the cost of thermal management? Let’s take a look at the differences in thermal conductivity between FPC and rigid PCB materials.
Figure 1 shows the two basic constructions using standard FPC and rigid PCB materials. Comparing material properties of the two constructions created using standard materials reveals very similar properties between the two sets of materials. Thermal management is critical to device performance. As such, materials have been modified over the years to manage the thermal output of high-performance components. Adjusted thermal conductivities for premium materials are shown in Table 1.
[Ed.: To enlarge the figure, right-click on it, then click View Image, then left-click on the figure.]
The increase in thermal conductivity is relatively small, especially in FPC materials. Given the disparity in material properties, what advantages does an FPC have over rigid? Given the lower thermal conductivity, two attributes contribute to the success of thermal management when using an FPC. First, the very thin materials permit a short, efficient path away from heat-generating components. The second is the ability to form the circuit, enabling intimate contact with heat spreaders such as frames, housings and metal stiffeners.
Let’s take a look at how some of these thermal management techniques are implemented. First, we will look at adding areas of metal to the circuit. This can be adding metal to the entire area of the circuit or only in localized areas where heat is generated. The two aspects of this are incorporating the metal into the laminate and laminating metal to the circuit.
As a metal core laminate, the polyimide is cast or laminated directly to a sheet of metal, typically aluminum. The aluminum can be on one side of the laminate or sandwiched in between two polyimide layers (single copper layer board, double copper layer board). A typical application is LED lighting.
The advantages include the availability of various metal thicknesses, and the rigidized substrate, which facilitates circuit fabrication, and which facilitates mounting of the circuit through screws/bolts or clips.
The disadvantages include board thickness and weight. Also, the aluminum backer can make processing difficult, as it is not compatible with all standard FPC/PCB wet chemistries. Finally, it is difficult to mill complicated outline shapes.
The second path to a metal backed circuit is to laminate metal to the finished FPC (Figure 3), a common practice within mobile devices. This method permits a highly customized board.
Advantages include multiple metal thickness can be placed on the same circuit; different types of metal can be placed on the same circuit; and unique metal shapes can be laminated to the circuit that do not have to match the circuit outline, recessed or overhang. Finally, metalized areas can be used as a robust circuit mounting location.
Disadvantages include higher manufacturing costs brought about by laminating the individual metal backer to a circuit; the unevenness of the circuit board thickness adds complexity to the assembly tooling; and a thin flex circuit with localized heavy sections due to metal backers adds complexity to circuit handling to prevent tearing.
Second is the use of thermally conductive adhesive to mount the FPC to external frames or housing. Typically used to mount metal heatsinks to components, this adhesive can be applied to the flex circuit by the manufacturer prior to shipment to be used as a thermally conductive mounting tape. Typically it is a pressure-sensitive adhesive type (PSA), but thermal set adhesives are available also. Such tapes can be processed with a variety of techniques to produce unique shapes and attachment methods. The tapes can be used very effectively with thin flex circuits with or without thermal vias to act as an interface to remove heat from the circuit.
The advantages of the tapes are they are easily processed into unique shapes; they come in a range of thicknesses from five to 20 mils; they can be placed within the circuit outline; and they can be used as an interface between uneven surfaces.
The disadvantages are they add a substantial thickness increase (minimum 5 mils) to the board thickness; and as with all PSA materials, they have a tendency to creep and may not have sufficient bond strength to adhere to very small areas. Finally, they can be quite expensive as material thickness increases.
Last is use of thermal management films. These films are designed to spread heat away from localized hot spots to prevent damage to surrounding components and remove hot spots from a device that can cause discomfort to the device user. The advantages include thicknesses down to 50µm, up to 1500 W/m-K thermal conductivity, a degree of flexibility, and customizable shapes. The disadvantages are relatively poor Z direction thermal transfer, a lack of suitability for tight bend radius, and a material cost much more expensive compared to stainless steel.
Flex circuit materials may not have thermal conductivity values as high as those of FR-4 or prepreg, but that does not mean they are not a good choice for circuits when thermal management has a high priority. Combining the properties of thinness and flexibility with thermal conductivity, a design can be selected that meets thermal management needs.
Dale Wesselmann is a product marketing manager at MFLEX (mflex.com); This email address is being protected from spambots. You need JavaScript enabled to view it.. His column runs bimonthly.
