QFNs have advantages over BGAs, but preconditioning specs and test methods are in order.
For good or for bad, I am known as the creep corrosion expert. We have had this discussion before; it is not exactly the claim to fame I was expecting in life. I have other knowledge and talents but nothing deemed worthy of industry-wide recognition or my picture on the Wheaties box. I was a cog in the wheel during the microvoid fiasco. I know a heck of a lot about galvanic attack and nickel hyper-corrosion, and a thing or two about soldering. My chances of becoming a professional athlete are slim to none at this point in my life, though that was a childhood dream. My biking times are way too slow to get me noticed on the triathlon circuit, and I stay away from performance-enhancing drugs. I did just recently start incorporating chia seeds into my diet. (All the yogis are doing it, so I figured I would try.) I rode 7 minutes faster this weekend over last, but either way, I’m still slow on the bike. I am not ready for competitive yoga. Frankly, I feel competitive yoga defeats the purpose of quieting the mind and resisting the urge to judge, but I digress.
So that leaves me as a creep corrosion expert with quite a lot of knowledge on surface finishing in electronics. This has earned me a nice seat as a session chair at SMTA International. I enjoy this responsibility and am honored to be asked. I find this conference to be an inviting atmosphere. I am always learning and meeting new people. The discussions and sessions provoke participants from different market segments and with different responsibilities to review the latest issues with an effort to find answers to issues plaguing all of us. Now that IPC and SMTA have joined for this year’s conference, I think we can enhance these important discussions with a more formal outcome via IPC recognition and possibly new standards.
When I was tasked with resolving microvoids, it was a new defect that no one knew much about. There was no industry knowledge on what caused it and no standard for acceptance. Actually, there still isn’t. When I was tasked with resolving creep corrosion, it was a defect that no one had seen, and there was no standard for how to test for it. There was no documentation stating what level was acceptable. Actually, there still isn’t today. Lucky for me, microvoids are pretty well understood, and the means for how to control them are in place globally. Also, there is an organized group trying to replicate real-world corrosion defects in a controlled lab environment. It has not been easy, but I maintain hope. I know collaborative efforts will bring a quicker resolution.
With constant industry changes, including advanced designs and more mobility of electronics, there will always be a need for more standardization to guide the successful making of products. Recently, I have been thinking more about electronic packaging. Use of QFN components is exploding. Prismark stated that in 2013 the QFN has been the fastest-growing package outside of flip-chip scale. Many have turned to QFNs over BGAs due to higher cost, design and manufacturing difficulties associated with BGAs. They have found that they can avoid the difficulties associated with BGAs and still achieve the desired electrical performance with QFNs. Yet, there is a need for appropriate preconditioning and test methods to ensure the performance and reliability of this component style and to be sure we are all testing to the same criteria.
The process of singulating IC packages such as QFNs by either a sawing or punching operation results in exposed copper on the sidewalls. This exposed copper surface can oxidize and lead to poor or no solder wetting up the sidewall during the assembly operation (Figure 1). The consequence of this oxidized copper surface is either incomplete or no solder fillet formation during the PCB mounting operation, resulting in solder joint reliability concerns. Currently, Jedec and IPC assembly standards do not specify a toe fillet for assembly. However, several component manufacturers have requested a toe fillet solderability process, which would improve current QFN reliability by ensuring toe fillet solder coverage. Work has begun on this with input from all parties: chemical suppliers, merchant packagers, EMS and OEMs. Amkor has shown through simulations and actual test data generated by customers that fillets – if formed – can improve board level reliability as much as two times for a package with large die-to-package size ratio.2
This topic and many other interesting subjects will be reviewed at SMTA International this month in Fort Worth, TX. I’ll be there; it is my favorite conference of the year, with the most valuable technical discussions. Be forewarned: this is an environment of collaboration. Be prepared to make friends and get involved in some interesting discussions.
References 1. Vern Solberg, “PBD Design Principles for QFN and Other Bottom Termination Components,” IPC webinar, June 23, 2011. 2. A. Syed and W. Kang, “Board Level Assembly and Reliability Considerations for QFN Type Packages,” Amkor white paper.
How a novel high-yield package cut costs by 32% vs. COB.
Physicists explore the fundamental constituents of matter by accelerating subatomic particles to speeds approaching that of light and colliding them head on or against stationary targets. The reaction products are then observed in various types of detectors. Recent experimental results from the CERN accelerator facility in Switzerland revealing the long-sought Higgs boson have been widely publicized. Researchers there, and at accelerators elsewhere, investigate the particles produced in such collisions.
The particles produced in these collisions are often bent by powerful electromagnets surrounding the detectors in order to determine the particle charge and momenta. The detectors incorporate tracking devices that capture faint electrical signals the particles produce during their transit. Various types of tracking devices are employed among the experiments at the different facilities, but many of them have in common a readout chip, the APV25, whose basic design was jointly developed for trackers at CERN nearly 20 years ago by a British university and a national laboratory.
The APV25 has 128 analog inputs that each connect directly to a tracker channel. The input signals are amplified and shaped, then sampled, and the results are fed into a pipeline of programmable length. The conditioned signals are read out after receiving a trigger request, further amplified, and multiplexed such that the signals from all 128 channels can be read out on a single line that has a differential current output.
The Compact Muon Solenoid is one of four detectors at CERN and one of two that identified the Higgs boson. Its tracker system has approximately 10,000,000 channels, which are read by the 128-channel APV25 chips (about 75,000 of them). The CMS tracker contains many concentric layers of sensors surrounding the interaction point. The APV25 sensors are wire-bonded directly to PCBs and encapsulated, not packaged, because the mass of a package could compromise particle detection in succeeding outer layers.
The wire-bonded, chip-on-board construction, though unavoidable in the CMS detector at CERN, is inconvenient. Board rework is impractical to replace a failed device; instead, the entire readout board would be replaced, even though the other devices on board are good. However, in some trackers at other facilities, detection would not be hampered if the APV25 readout chips were packaged. Such is the case at the Brookhaven National Laboratory Relativistic Heavy Ion Collider (RHIC) in Long Island, NY, for example.
Bates Research and Engineering Center at Massachusetts Institute of Technology was engaged by the Brookhaven laboratory to design readout electronics for an upgrade to the detector system of the STAR experiment at the RHIC (sidebar). Bates is part of MIT’s Lab for Nuclear Science. It is an engineering facility that designs and constructs instruments for physics experiments in support of work by MIT faculty and other researchers. The initial prototype readout module for the STAR tracker ganged five APV25 chips wire-bonded directly to a printed circuit board. The first prototype module was a composite of two boards laminated together, which distributed the chips’ inputs via bond wires to edge connectors. It was very expensive to fabricate and assemble, and permitted no rework once a chip was bonded to the board.
To reduce the cost of the module, enable the readout chips to be tested immediately before installation, permit rework, and simplify the application of the APV25 to other projects, Bates developed a BGA package for the die and redesigned the readout module. For tracker architectures in which the BGA mass would not interfere with particle detection, the approach greatly simplifies the design, assembly, and maintenance of readout cards.
The BGA package that Bates developed for the APV25 has 315 SnPb solder balls on a 0.8-mm pitch and measures 15 x 20mm. Of the 315 balls, 39 provide only mechanical support and have no electrical function. The package substrate is a four-layer design with 50µm trace width and spacing, using Nelco 4000-29 material (Figure 1). All the slow controls, the clock, the trigger, and the chip analog outputs were routed to one edge of the BGA; the 128 tracker inputs are on the opposite long edge of the package, no more than four balls deep from the edge, with some wrap around. The layout enables routing to all the input channels using only two signal layers on host readout boards. A grid of 9 x 9 balls directly under the die corresponds with a grid of vias connected to the die attach pad for excellent thermal conduction and electrical contact to the negative power plane in the tracker module (Figure 2). Sierra Circuits fabricated the BGA substrates, as well as the boards for the tracker modules, which each monitor 640 channels (Figure 3).
The packages were assembled with known-good die, which were bonded with 25µm gold wire and encapsulated. A test board with a custom BGA test socket was used to evaluate the basic functionality of the assembled APV25 devices. A 94% yield was achieved.
It is helpful to compare the costs to produce 80 tracker modules of the chip-on-board design and 80 tracker modules with the BGAs. Including NRE, that many chip-on-board tracker modules would cost more than $65,000, versus slightly less than $44,000 for the BGA version, including NRE.
The Physics of RHIC
The Relativistic Heavy Ion Collider primarily collides ions of gold, one of the heaviest common elements, because the gold nucleus is densely packed with particles. The ions are atoms of gold that have been stripped of their outer cloud of electrons.
Two beams of gold ions are collided head-on when they have reached nearly the speed of light (what physicists refer to as relativistic speeds). The beams travel in opposite directions around the facility’s 2.4-mile, two-lane accelerator and at six intersections the lanes cross, leading to an intersection.
If conditions are right, the collision “melts” the protons and neutrons and, for a brief instant, liberates their constituent quarks and gluons. Just after the collision, thousands more particles form as the area cools. Each of those particles provides a clue about what occurred inside the collision zone.
Physicists had postulated that all protons and neutrons are made up of three quarks, along with the gluons that bind them together. Theory holds that for a brief time at the beginning of the universe there were no protons and neutrons, only free quarks and gluons. However, as the universe expanded and cooled, the quarks and gluons bound together and remained inseparable. The RHIC is the first instrument that can, in essence, take us back in time to see how matter behaved at the start of the universe.
Brookhaven National Laboratory announced in 2010 that the RHIC had produced the highest temperature ever recorded (4 trillion degrees Celsius, roughly 250,000 times hotter than the core of the Sun), thus recreating an exotic form of matter that had not existed since microseconds after the Big Bang. Researchers for the first time were able to positively confirm the creation of the quark-gluon plasma. For less than a billionth of a trillionth of a second, quarks and gluons flowed freely in a frictionless fluid that hadn’t existed for 13.7 billion years.
Benjamin Buck is an electronics engineer at MIT Bates Research and Engineering Center and designer of the BGA package and associated electronics for the STAR experiment at the Relativistic Heavy Ion Collider at Brookhaven National Laboratory; This email address is being protected from spambots. You need JavaScript enabled to view it..
Sales of digital cameras in Japan have steadily decreased since last year. Digital camera sales experience seasonal fluctuations, but sales forecasts have been correct since 1990. The reason for this predictability is very simple – consumers buy cameras during holidays and special events, and no one buys cameras any other time during the year.
As companies benefit from the global supply chain in terms of lower production costs and faster turnaround times, they are also exposing their intellectual property to third parties, including PCB design data. It’s easy to get complacent about this topic, but it’s important to remember that a company’s IP is often the basis for its competitive advantage.
Read more: How to Protect PCB Design Intellectual Property
PCB thickness has a major effect on controlled impedance, but that’s not the only influencer.
The electrical performance of a printed circuit board can be greatly impacted by how it is fabricated, especially at higher frequencies. High-frequency PCBs incorporate controlled-impedance circuit traces that require tight conductor etching tolerances and tight control of thickness. In addition, electrical losses must often be controlled at higher frequencies, and such losses can be influenced by fabrication issues, such as the application of solder mask and electroless-nickel-immersion-gold (ENIG) surface plating. Even cleanliness issues in PCB fabrication can have an impact on the electrical performance of the final fabricated board.
Higher-frequency circuits depend on tight control of transmission-line impedance, and a number of factors can contribute to variations in impedance. Some concerns may be more or less important depending on the circuit thickness. Many of these circuits are fabricated as multilayer PCBs, and a multilayer PCB will serve as a good example of how fabrication processes can affect the performance of a PCB. This example will use a multilayer PCB with the two outer-most layers formed as a high-frequency microstrip transmission line. In this example, it is a single-ended transmission line, with one layer containing the ground plane and one layer holding the conductive signal trace.
When fabricating a controlled-impedance circuit, such as the microstrip circuit example, the conductor width may not be as critical as other issues during fabrication, depending on the thickness of the circuit. Modern fabrication processes can control the conductor width within ±1 mil, and if the conductor width varies 1 mil for a thicker circuit, it will have less impact than the same variation on a thin circuit. Table 1 offers comparisons for a microstrip transmission-line circuit fabricated on two different thicknesses of a novel laminate. The top part of Table 1 is for 10-mils thick RO4350B laminate, while the bottom shows values for 4-mils thick laminate. A 1-mil conductor width difference for the thicker circuit makes a difference in characteristic impedance of about 2.8%, while the same difference in conductor width for the thinner circuit translates into a difference in characteristic impedance of 6.5%. If a 20-mil-thick version of the same type of laminate were used in this example, considering a change in conductor width of 1 mil, it would mean a 1.4% difference in characteristic impedance.
Table 1 covers much ground in comparing differences with two thicknesses of PCB materials, including a change of 10% in substrate thickness. Such a change has about the same effect on both the 4- and 10-mil laminates, about a 6.3% change in impedance. For the different circuit features being considered for their effects on impedance, the change in thickness, as a percentage, has some of the most significant effects regardless of the nominal thickness. Typically, if this portion of the circuit is made with a copper-clad laminate, there is better thickness control than if this portion of the circuit is made with prepreg and a raw foil lamination. For circuits requiring tightly controlled impedance, the use of the laminate may be a better choice than the prepreg-foil lamination.
Table 1 also details the effects of thickness in copper thickness, showing that it has a more significant effect for the thinner circuit than the thicker circuit. This is a trend that is followed by microstrip transmission-line circuits, as well as most other high-frequency PCB circuit types. For some circuit types with coupled features, such as grounded coplanar-waveguide circuits or differential-pair circuits, differences in copper thickness may have even greater impact on changes in impedance. Table 1 also lists the effects of changes in dielectric constant (Dk) or, in the case of this table, in Design Dk, which is an average, practical value of Dk developed based on measurements under different operating conditions and meant to be accurate when used as the value for Dk in software simulation tools. Changes in Dk or in Design Dk often receive much more attention than necessary when troubleshooting circuit performance issues. For the thicker circuit, a change of 0.1 for the Dk value has the least impact on impedance, considering the effects of changes in the other circuit features, and the same can be said for the thinner circuit. In this example, a Dk difference of 0.1 is the total range possible for the studied materials; other PCB materials may exhibit a far wider range in Dk values and greater impact on circuit performance. (Information contained in Table 1 was generated from an impedance-loss-modeling software tool from Rogers Corp. called MWI-2013, available at rogerscorp.com/acm/technology/index.aspx.)
Insertion loss is the total electrical loss exhibited by a high-frequency circuit, resulting from a number of different loss components. These loss components include conductor loss, dielectric loss, radiation loss, and leakage loss. Of these losses, RF leakage loss is typically insignificant for most PCB materials and applications due to the high-volume resistivity of the material. Radiation loss can be difficult to evaluate, since it is related to the circuit design, thickness, frequency and material Dk. For the purposes of this discussion, radiation loss will not be considered as a significant loss component. But dielectric loss and conductor loss will be considered significant loss components, and will be covered in greater detail below.
Dielectric loss is related to a PCB material’s dissipation factor or tangent delta. Basically, a higher dielectric loss will cause higher circuit insertion loss, although that depends on the circuit thickness and the effects of conductor loss.
Conductor loss is based on many variables and is often the culprit of unexpected increases in insertion loss when troubleshooting RF circuit performance. Conductor loss depends on substrate thickness, copper surface roughness, conductor width, conductor thickness, circuit design, and finish. Assuming insignificant radiation loss, a simple way to consider insertion loss is to see how much dielectric loss and conductor loss contribute individually to insertion loss. In a thick microstrip circuit, say 60 mils thick, where most of the circuit is dielectric material, conductor losses will have very little impact. For a thinner microstrip circuit, however, when the dielectric material is less than 10 mils, conductor losses are more significant and dominate the overall insertion loss. In a yet thinner circuit, such as only 5 mils thick, conductor losses and electrical properties associated with conductor losses will dominate. In general, when considering a low-loss RF/microwave circuit material, a material with a circuit thickness of about 20 mils will offer an even contribution between dielectric loss and conductor loss.
Figure 1 compares the example circuits and plots how dielectric and conductor losses add to insertion losses. Figure 1 also shows the impact of using novel smooth and rough (standard electrodeposited) copper surface treatments on the 4-mil circuit. The rougher copper surface results in higher conductor losses.
Figures 1a and 1b compare different thicknesses of the same circuit substrate material, showing the impact of conductor loss. The 10-mil-thick circuit in Figure 1a shows that the conductor loss is slightly higher than the dielectric loss, with the two types of losses adding to yield the total insertion loss. The thinner, 4-mil-thick version of the same substrate material in Figure 1b shows how conductor loss dominates and is a much greater component of the insertion loss.
A comparison of Figures 1b and 1c shows the effects of copper surface roughness for the same 4-mil-thick substrate type. The same copper weight is used in both cases, but smoother copper is used in the 4-mil laminate of Figure 1c. The insertion loss for the 4-mil-thick laminate with smooth copper (Figure 1c) is much less than for the 4-mil-thick laminate with standard copper (Figure 1b). Since there is no significant difference in dielectric loss, the main component making the difference in insertion loss is the difference in the copper type or specifically the copper surface roughness.
Copper is a good conductor, although copper roughness can impact loss performance, but other issues can impact PCB conductor losses, such as surface finish. ENIG finish is often used in the PCB industry, and it is a very good finish for many reasons. However, this nickel layer has only about one-third the conductivity of copper, and thus will increase the conductor loss of a high-frequency circuit.
Even gold, which is considered a good conductor, is not as conductive as copper and can contribute to circuit conductor losses. The thickness of the nickel/gold layer will also play a role on which frequencies are affected by losses due to skin effects. Skin effects refer to differences in current density for conductors at different frequencies. As frequency increases, the current density will occupy less of the conductor. But when using a lower conductivity metal, the skin depth will increase, so a nickel layer will force the current to reside in this layer more than might be expected with a copper layer.
Since an ENIG finish covers the outer three surfaces of a microstrip conductor, as seen in a cross-sectional view, it does not have an impact on the electric fields directly between the signal and ground plane layers. But an ENIG finish does have an effect at the bottom edges of the conductor, an area that will typically have higher current density.
An exception to the circuit finishes typically used in the PCB industry is silver. Pure silver is more conductive than pure copper. Although the silver used in the PCB industry is not pure, it does offer very good conductivity, with very little impact on conductor losses when applied to copper circuits as a finish. Figure 2 shows microstrip transmission line circuits with different finishes, measured for insertion-loss performance. It also shows the effects of solder mask applied to bare copper on a 20-mil-thick circuit laminate.
The loss differences associated with the metal finishes are related to conductor loss. However, the loss due to the solder mask is related to dielectric loss. A microstrip circuit operates with electric fields in the substrate material and in air above the signal conductor; the loss in the air is lower than that in the material. When the signal conductor is covered with solder mask, air is used less, and the dissipation factor of the solder mask adds to the dielectric loss, which ultimately adds to the insertion loss.
As expected from the details of Figure 1, the impact of insertion loss due to increases in conductor loss with an applied finish will be greater for a thinner circuit than for a thicker circuit. This is reinforced by Figure 3, using a low-loss, 10-mil-thick material, where the insertion losses of circuits are compared using bare copper and with an ENIG finish.
There are other aspects of circuit fabrication that can be difficult to characterize regarding impedance and loss variation, and one of these issues is circuit cleaning. Circuits undergo many different wet chemistry processes during fabrication; having a thorough chemical cleaning of a circuit is necessary for many reasons. Circuit cleanliness is typically very difficult to detect because it generally concerns a residue that cannot be seen, but may have some free ions associated with it. If ions are concentrated around the edges of a conductor, they can cause the electric fields to extend beyond the edge of the conductor. Extension of these fields can cause a circuit to behave as if its conductor was wider, with a corresponding change in effective impedance. The ions can also cause an increase in loss, since the ion path will exhibit low conductivity compared to a copper path.
To demonstrate this concept, a simple experiment was performed, where circuits were processed through a typical sulfuric acid bath, and then one circuit was cleaned very well and the other circuit only partially cleaned. The partially cleaned circuit still had sulfuric-acid residue; however, this was not visually obvious. The circuits were 10-in.-long microstrip transmission-line circuits. Insertion loss measurements were taken, and the results are shown in Figure 4. As can be seen, cleanliness translates to lower loss.
In summary, many fabrication issues can affect the electrical performance of a high-frequency PCB. The thickness of the circuit board plays a major role in different PCB issues related to controlled impedance, with a thin circuit more susceptible to impedance variations caused by normal circuit fabrication processing than a thicker circuit. PCB material thickness can also influence the amount of circuit losses exhibited at higher frequencies. And circuit cleanliness can play a role in circuit performance, although this can be difficult to characterize.
John Coonrod is a market development engineer at Rogers Corp., Advanced Circuit Materials Division (rogers.com); This email address is being protected from spambots. You need JavaScript enabled to view it..
Ed.: John Coonrod will present “Electrical Challenges for PCB Millimeter-Wave Applications” at PCB West at the Santa Clara (CA) Convention Center this month (pcbwest.com).
Have you registered for PCB West, the Silicon Valley's largest printed circuit board trade show? Sept. 24-26, at the Santa Clara Convention Center. www.pcbwest.com
The latest extension to the age-old format describes layer structures, features and functions.
Output and read by every PCB design and engineering system in the world, the Gerber format is the de facto standard for one of the industry’s most delicate, critically important processes: CAD-to-CAM data transfer. Simple yet powerful, Gerber is an image description language that permits complex designs to be described completely and accurately in an unequivocal one-file/one-layer format. The format uses a structure that can be read by machines and humans.
This takes care of the largest and most complex part of any CAD-CAM archive, by describing graphically all the layers and all the drilling and routing needed for a particular PCB. But another smaller, but no less important, part of the PCB design archive, not being an image, cannot currently be transmitted using the Gerber format. This includes a number of files that provide the following information:
Netlist.
Function of the image and drill files.
Stackup, materials and colors.
Various manufacturing instructions.
On its face, this looks simple enough to resolve. And indeed in the case of the netlist, it already has been: the well-known IPC-356A standard has been around for decades, and is a perfect format for transmitting netlists. In practice, however, the IPC-356-A file is often missing or is poorly used, creating confusion and extra work for the CAM engineer. But an accurate IPC-356A format is a perfect solution for this part of the archive.
All the other information – function of images and image elements, stackup, materials, colors and general instructions – is, frankly, a confusing mess that forces CAM engineers to search for, interpret or even guess designers’ intentions. This is because there is no standard for adding this sort of information – so designers may add it in the file names themselves, or they may embed it within the image. Which means that you may find a comment in the top righthand corner of one of the Gerber images that this is in fact the top solder mask layer, and that incidentally, the solder mask is blue. Or you may not. The information about the layer may be in a completely different place – in a separate pdf file, drawing or text document for example – or it may not even exist. All of which creates unnecessary additional work for the CAM engineer, and adds costs and time to the process, and in some inevitable way, to the final product. At worst, it can result in scrap, or poor product performance.
An article earlier this year1 explored how the Gerber and IPC-2581 formats could together close this gap in the most intelligent way possible – by tweaking formats that are already used and understood by the industry, in such a way that improvements can be introduced seamlessly, without disrupting their use or the marketplace’s understanding of them. In that article, it was explained that as the image part of CAD-CAM transfer is not broken, it does not need fixing. Gerber has performed this task brilliantly for years, is well known, well tested, and doesn’t need changing.
What is broken, however, is the transfer of the additional written instructions, function and descriptive data. IPC-2581 can, with a minimal change, be used to transmit some of these data – stackup, component and other archive data – in a standardized manner that would make sense across the industry, while keeping Gerber as an image format. Thus CAD and CAM professionals – and their system vendors – would reap the benefits of vastly improved archive transfer, while continuing to use an image format that works reliably, without having to implement entirely new, complex and potentially bug-ridden workflows that require lengthy testing and approval processes.
A Second Gerber Extension
This article develops on that theme by presenting our proposal for the other part of the equation: a revision to the Gerber format that brings clarity and order to the transfer of additional information closely linked to the image data. This revision would replace the currently confusing and chaotic practices with a clear procedure and structure. It would dovetail perfectly with the abovementioned changes to IPC-2581 proposed in January, but is also a powerful improvement in its own right and as a standalone development. In fact, for typical cases it will deliver no less than 80% of what would be possible were Gerber and IPC-2581 combined.
The new revision provides designers to a standard method, which at the very least can serve as a kind of pro memoria to ensure that the archives sent to CAM include all the data needed. It also provides a method to describe the layer structure and the part of the PCB that each image describes, as well as the features it contains, using a clear industry-wide standard instantly recognizable to CAM. Thus all parties, regardless of manufacturing processes and products, location, culture or language, would be able to communicate reliably in a transparent, clear-cut way that leaves absolutely no room for doubt.
Just as important, this revision will make the descriptive data just as machine-readable as the current Gerber image data, permitting a greater degree of automation.
Further, the extension requires minimal tweaking to existing CAD and CAM systems, all of which are capable of supporting it and would benefit from it, while designers and engineers would have a standardized procedure that would require very little to change in working practices. Equally important, this extension does not disrupt existing workflows. If the software does not support the new capabilities, the old workflow continues to operate. Nobody is forced to buy anything.
How will it work? The current Gerber format, Extended Gerber, will have a second extension added to it, whose draft specification is currently in preparation. For the purposes of this article I will refer to the current Extended Gerber format as the First Extension (X1), and the proposed new Gerber format as the Second Extension (X2).
Let’s have a look at the general principles by which X2 works.
Attributes
At the heart of X2 is the use of attributes. These are akin to labels that provide information associated with image files, or features within them. The beauty of using attributes is that this is an image description term that is already familiar to CAD and CAM professionals and software developers, and that sits naturally with the current capabilities of CAD and CAM systems.
X2 will extend the current Gerber specification with a series of standard attributes that are most important for efficient CAD-to-CAM communications.
File-specific attributes. As outlined above, Gerber data are transferred in an archive containing a number of files. There is an image file for each layer of the PCB and, where the Gerber format is used for drill data, for this as well. There are also several text files and drawings that provide extra information. One of the first things that a CAM engineer must do with an incoming PCB design archive is to assign the layer files into an order that mirrors the PCB build, with all the copper, solder mask, legend, drill and other layers in sequence. There is no standard for this file assignment: every CAD designer documents this according to an individual, personalized system, so the CAM engineer would not intuitively know whether a file contains a copper or a solder mask layer. This information only becomes clear on opening the file and seeing the image, or by searching through the accompanying text documents, or by finding the information within the image itself – or in extremis by picking up the phone to the customer.
One solution is to adopt a standard file function attribute, readable for machines and humans, by which the function of the image contained in the file is clear. We have adopted this approach for X2 because it is simple and also because it is compatible with all existing CAD and CAM systems. For example, the statement %AF,FileFunction,Solder mask,Top*% added to the header of the Gerber file will indicate that the function of the image is the top solder mask. CAM systems that support attributes will automatically assign the file to the top solder mask slot in the layer structure. CAM systems that do not support attributes will throw an error message such as “Unknown parameter %AF,FileFunction,Solder mask, Top*%” but still read the image correctly, as with X1. Even the error message informs the CAM operator clearly what the file represents, and they no longer need to scour the whole archive to find that information.
All functional layers can be identified in this way, and even additional drawings with manufacturing instuctions will be identified and ordered by the CAM system.
The file context attribute provides further information, so that when the software finds the attribute %AF,FileContext,Coupon*%, it knows that this file describes a test coupon and not a single PCB, or a production panel and so on. The attributes offered by X2 are highly articulated, providing a wealth of information to CAM software and engineers that is easy to see and understand at a glance.
Object attributes. Just as layers can be labeled with attributes, so can the various objects within them – features such as flashes, draws and areas. So, for example, every time the CAM system reads a round pad that is associated with the attribute statement %AO,PadFunction,Via*%, the system will recognize it as a via pad. CAM needs to know where the vias are because they are treated in a specific way when handling the solder mask, and certainly when they must be plugged.
Universal Compatibility
Making the industry’s CAD and CAM systems X2-ready requires a small tweak on the part of the CAD and CAM system vendors. This effort would be repaid many times over by an overall improvement in the way that CAD and CAM professionals work together. By tweaking their systems, vendors will allow users to standardize and automate much of the archive creation and entry process. But X2 files will be compatible with untweaked CAD and CAM systems too, because even though they support the image, none of the new parameters can affect it. In this case, X2 files will be processed as if they were X1 files, and the correct image will be generated. CAM engineers with untweaked systems will still benefit from receiving their files in X2, because even if their CAM systems may not recognize an attribute statement like “File function: Top copper layer”, they certainly will, which will greatly ease their management of incoming archives.
As such, the X2 format saves designers and CAM engineers time and contributes to a faster turnaround of requests and orders. Even if the CAM system does not support the attributes, the operator will be able to follow their established workflow. No expense is imposed on the manufacturer.
A major benefit of this approach is the geometric part of image transfer is left as is. This is fundamental, as the most complex part of the description of a PCB is the image. Geometric software is hard to get right and takes a long time to debug, often years. The Algorithm Design Manual2, for example, says that: “Implementing basic geometric primitives is a task fraught with peril” and “Expect to expend a lot of effort if you are determined to do it right.” Yet for the CAD-CAM transition, we absolutely have “to do it right”; errors in images, fiendishly difficult to detect, are highly likely to lead to scrap. Knowing this, CAD and CAM professionals are rightly reluctant to rely on new image formats. With this revision, this is not an issue. The geometric part of current Gerber-based data transfer remains the same both for writers and readers.
As custodians of the Gerber format, Ucamco is dedicated to ensuring that it serves its industry to the best of its and our capabilities, in the most integrated, intelligent way possible. X2 complements current processes, while enhancing designers’ and manufacturers’ ability to communicate with each other. In so doing, we believe that we are doing our part in helping our industry toward a better future.
For more information, visit www.ucamco.com/Portals/0/Public/Extending_the_Gerber_Format_with_Attributes.pdf for a detailed article on the technicalities of the new extension. Similarly, all PCB manufacturing, design and engineering professionals are encouraged to work with us on this evolutionary step for our industry.
Karel Tavernier is managing director of Ucamco; This email address is being protected from spambots. You need JavaScript enabled to view it..
Have you registered for PCB West, the Silicon Valley's largest printed circuit board trade show? Sept. 24-26, at the Santa Clara Convention Center. www.pcbwest.com
