ProtoMat E44 printed circuit board plotter is for mechanical milling and drilling of PCBs out of fully coated base substrates. Features increased spindle speed and a camera for read-in of material position; enables production of double-sided PCBs with micron-level precision and control of the milling channel width. Requires power outlet and dust extraction unit for operation. Is designed for training purposes or occasional use.

LPKF, www.lpkf.com

Ansys 17.0 features improvements across the entire workflow, from modeling to post processing. SpaceClaim Direct Modeler speeds time to CAE with improved performance for importing complex models and more tools for faster geometry creation and editing. New industry-specific vertical solutions facilitate OEM-supplier interactions while adhering to such industry standards, such as ARINC 664/653, FACE and AUTOSAR. Chip-package-system design workflow for electronics is more tightly integrated and automated, and now includes across-the-board performance improvements for power integrity, signal integrity and EMI analyses. High performance computing improvements provide 20 to 60X performance gains for package and board simulation. Thermal analysis in now integrated and automated in SIWave.

Ansys, ansys-blog.com/introducing-ansys-17/

RollMaster roll-to-roll material handling system for flex printed circuit manufacturing is for high-volume manufacturing of thin and sensitive materials. Processes a range of materials, including those prone to wrinkling or stretching. Patent-pending Dynamic Tensioning technology continuously adjusts for changes in bidirectional tension placed on flex material as result of acceleration and deceleration of material during processing. Designed specifically for use on ESI 5335 laser drill platform. Can be paired with all legacy FPC laser processing systems built by ESI since 2005.

Northfield Automation, northfieldautomation.com

ESI, esi.com

Sigrity 2016 includes automated support for IBIS-AMI model creation, fast and accurate channel model extraction using multiple field solvers, and an automated power-aware signal integrity analysis report to validate a virtual USB 3.1 channel. Leverages validated equalization algorithms and provides automated methodology for combining, paramaterizing and compiling algorithms into an executable model. "Cut and stitch" technology creates accurate channel models faster using a mix of hybrid and 3D full-wave field solvers. With minimal manual intervention, serial link channel can be divided into sections, solved for and automatically stitched together into a single interconnect model. Rapid model extraction technique enables trade-offs of various signal routing and layer transition strategies.

Also includes:

• New quasi-static 3D field solver integrated with 3D full wave and hybrid solver technology available for both IC package and PCB analysis
• Electrical Performance Assessment integrated directly into the IC Package Designer's layout environment
• Optimized decoupling capacitor schemes updated to Allegro® PCB layout
• Improved Power Integrity analysis methodology for PCB designers

Cadence, cadence.com/news/sigrity2016