Santa Clara, CA, June 29, 2018. Cirexx International announced today that they have recently had a successful completion of their AS-9100 Revision D audit. The audit was conducted by two DQS auditors and over the 3 full day event they interfaced with many individuals and all levels of the company’s personnel. The auditors were hosted by Cirexx Lead AS-9100 Representative Ed Otero with assistance from Gonzalo Leypon. The company completed the effort in only 4 months, which the auditors commented was very expeditious for our industry. The Revision D release of AS-9100 contains significant differences from its predecessor Revision C. This new revision delves deeper in to the company all the way up to equity stakeholders.
Philipp Menges, President and CEO of Cirexx said, “I am extremely proud of our staff and our facility for passing this stringent audit. Cirexx is proud to be a PCB shop who passed with relative ease.” Menges added, “A lot of the work that we have been doing for years with other certification programs, such as DLA and ITAR/DAR and implementing enterprise systems has contributed to the “corporate personality” that made this possible.”
The website can be accessed at: https://www.cirexx.com.
About Cirexx International
Founded in 1980, Cirexx International, Inc. is an electronic solutions company offering PCB Design, PCB Fabrication and PCB Assembly of high-reliability Printed Circuit Boards, RF/Microwave Circuit Boards, Flexible Printed Circuits and Rigid-Flex Circuit Boards. Recognized as a time-technology leader, the company offers a genuine Quick Turn service and provides a one stop shop and all in-house solution known as Seamless Integration. Cirexx has expertise fabricating high layer count Printed Circuit Boards using a variety of substrates including a wide array of high-frequency RF-based materials in mixed (hybrid) constructions. Cirexx delivers unsurpassed quality and support to a large array of customers in the high-reliability markets of defense/aerospace, industrial, and medical instrumentation.
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SAN DIEGO, CALIFORNIA (PRWEB) JUNE 28, 2018 -- Altium, a leading provider of electronics design systems for PCB design, today announced its sponsorship of seven teams at SpaceX’s upcoming 2018 Hyperloop Pod Competition, which will take place on Sunday, July 22, 2018 at SpaceX’s headquarters in Hawthorne, California. Now in its third installment, the competition aims to accelerate the development of functional prototypes and encourage up-and-coming university and innovator teams to design and build the best transport Pod for high speed ground transportation. A sponsor since the first competition in 2015, Altium is proud to provide tools to help enable the next generation of electronics engineers.
SpaceX held its first-ever Hyperloop Pod Competition in 2015 to give global teams the opportunity to design and build a Hyperloop Pod to bring to life Elon Musk’s vision of a high-speed ground transportation. Last year’s winner, WARR Hyperloop of Technical University of Munich (currently sponsored by Altium), reached a pod speed of 201 mph. This year’s competition will be judged solely on one criterion: maximum speed with successful deceleration (i.e., without crashing). Additionally, all Pods must be self-propelled. Since its inception, the competition has continued to inspire electrical engineering students around the world to push the boundaries of innovation.
“Sponsors to us are absolutely our lifeline,” said Johnny Kohlbeck, operations director at Badgerloop. “If we did not have the support that industry sponsors like Altium provide, we would not be here today. There are a number of PCB software tools out there yet Altium has one of the most advanced tools,” said Vaughn Kottler, electrical engineer at Badgerloop. “The fact that you can check your entire schematic against your layout is just awesome and helps ensure that you are able to bring your concept to life.”
Altium plays an important role in these competitions by providing teams with the professional software they need to design circuit boards that allow the Pods to function. This past year, Altium’s sponsored team, Badgerloop, used Altium Designer to design boards like the STM nucleo microcontroller board and shield that they could reuse as new iterations of pods were developed. To streamline the workflow, they developed a subversion network which allowed them to work closely and collaboratively on PCB designs during the summer when team members resided across two continents and three time zones.
Altium is sponsoring seven teams who are attending the 2018 Hyperloop Pod Competition. The teams hail across five countries in the U.S., The Netherlands, Switzerland, Germany and Scotland. The teams include Delft Hyperloop of Delft University of Technology; HyperXite of University of California, Irvine; Swissloop of ETH Zurich; WARR Hyperloop of Technical University of Munich; UW Hyperloop of University of Washington; Badgerloop of University of Wisconsin–Madison and HYPED of University of Edinburgh.
"At Altium, we believe the bold and innovative ideas from this competition may one day lead to the realization of the potential Hyperloop’s concept has to transform ground transportation,” said Ted Pawela, Chief Operating Officer at Altium. "We are excited to see the successes of these young and talented electrical engineering students and are proud to have helped them in our own small way."
About Altium
Altium LLC (ASX:ALU) is a multinational software corporation headquartered in San Diego, California, that focuses on electronics design systems for 3D PCB design and embedded system development. Altium products are found everywhere from world leading electronic design teams to the grassroots electronic design community.
Register now for PCB WEST, the largest trade show for the printed circuit design and electronics industry! Coming Sept. 11-13 to the Santa Clara Convention Center.
Haverhill, June, 2018. Presented for the first time in US during IPC Apex, it will also be shown at Semicon West booth 509, Pilot V8 Next> series, the most versatile and performing flying probe system in the world, which represent yet another outstanding technological leap forward in Seica’s continuous “road” to innovation.
Deadline for technical conference paper abstracts extended to: June 29, 2018
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