Differences in maximum ripple current and ESR can lead to a shift in the ripple current – and premature failure.

During the design of a power supply, careful consideration must be given to the equivalent series resistance and ripple current, as well as the total output capacitance. The capacitors should be as identical as possible, with the same ESR and ripple current capacity.

Early life failures can occur as a result of using two different capacitors. In the case below, the capacitance value and working voltage rating of each were the same. However, the maximum ripple current and ESR were substantially different. This causes a shift in the ripple current through the capacitors and caused the supply to fail prematurely.

The design of the power supply called for the following:

• Maximum ripple current: 1400mA.
• Maximum allowable ESR: 50mΩ.
• Total capacitance: 940µF.

This design used two different capacitors in parallel to meet these requirements. One capacitor was a Series A capacitor, while the second parallel capacitor was a Series B capacitor. Table 1 compares the two capacitors. The capacitors were well matched, except in two areas: the maximum allowable ripple current and the ESR.



The ESR of a capacitor acts as a resistance in series with the capacitance (Figure 1). The difference in ESR meant that the ripple current did not split evenly between the two capacitors. Equation 1 shows the calculation of current through the resistors (and hence the capacitors).

Given the values shown above and the estimated total ripple current of 1400mA, IR1 is ~500mA (640mA max), while IR2 is ~900mA (760mA Max). The ripple current through C2 is about 20% greater than allowed. This excessive ripple current caused C2 to overheat and lose its electrolyte. C2 then acted as an open circuit, forcing all ripple current through C1, quickly causing its failure as well.

The standard practice of using parallel capacitors to increase the ripple current capacity and reduce the total output resistance must be used with caution. The capacitors must be identical in ESR and ripple current, as well as in capacitance. Otherwise, the ripple current will not be split evenly and will cause early life failures.

Mark Woolley and Jae Choi are with Avaya (avaya.com); This email address is being protected from spambots. You need JavaScript enabled to view it..

For the first time, conductor sizing charts compare with engineering calculations and test data.

IPC-2152, Standard for Determining Current-Carrying Capacity in Printed Board Design, begins with a baseline configuration that provides a conservative method for sizing conductors for carrying current in printed circuits. New charts included in IPC-2152 are based on tests conducted on traces in boards with no copper planes, suspended in still air, as well as in vacuum. The baseline represents a defined board thickness, board material, conductor width and thickness, as well as variations with respect to those variables.

IPC-2152 is a technology enabler. Through the use of computer modeling and information within IPC-2152 and its Appendix, current carrying capacity design guidelines can be optimized for any variation in printed circuit technology. Until the publication of IPC-2152, this was not possible with the available public information.

IPC-2152 contains information that can be used to develop current carrying capacity guidelines for individual designs. Beginning with an explanation of the conductor sizing guidelines in IPC-2221, a discussion will be presented that illustrates the value in IPC-2152.

Background. In 1955 the United States National Bureau of Standards was funded by the Department of the US Navy to develop a method for evaluating conductor current carrying capacity in printed circuits. It was at a time when printed circuits were being introduced as a technology. The conductor sizing design guidelines preceding IPC-2152 were based on the results of that funding. The result was a chart (Figure 1) labeled “tentative.” Although it was published as a chart for sizing external conductors, it eventually became Mil-Std-275.



The method used to size conductors, which will be addressed again at the end of this article, is performed using graphs or charts. The graphs showed a relationship between conductor cross-sectional area, applied current and temperature rise.

This method of sizing conductors is a well accepted legacy method, although misunderstood by many using the charts. Some of the confusion comes from trying to compare these charts with data collected from PCBs or analytical results of the same. The internal conductor chart in IPC-2221 offers the biggest challenge when making these types of comparisons. The only way to understand the relationship between any given design and these charts is to understand the information used to create the chart being used. Figure 2 shows one set of results compiled for the purpose of developing the chart in Figure 1.

Multiple test vehicles were used to develop Figure 2. Those test vehicles were used to collect conductor temperature rise data as a function of cross-sectional area vs. current from boards of multiple materials, varying board thicknesses, varying copper thicknesses, and boards that included copper planes, in multiple combinations. It also contains conductor temperature rise data from conductors stripped from the boards and tested in free air. The lower line in Figure 2 represents the conductors tested in free air.1 Use points on this line, for example, 0.0362" and 1A in addition to 0.4002" and 5A, and compare this with the 10°C line in Figure 3. In addition, compare the defined conductor size for 5A and 10A for a 10° and 45°C temperature rise in Figure 3 with Figure 4. Then Figure 4 is a new chart for 1 oz. conductors in an air environment from IPC-2152.

The IPC-2221 internal conductor sizing chart, Figure 2, actually represents a conductor in free air. This is not what one expects when initially making a comparison between actual data and thermal modeling results, although it offers insight into what can be used as design criteria. This poses a question. Can there be a single chart that can be used to size conductors for all board designs? The answer is yes, although it is conservative and may not allow line and space sizing desired in a specific design. Figure 3 represents that chart. The next question is, how different from Figure 3 is the current carrying capacity in a specific design?

The old charts oversize conductors. The benefit from using them is the impact to the thermal management of the rest of the printed circuit assembly is negligible. When optimizing trace size and spacing, it is important to understand the limits of conductor temperature rise and current.

The use of charts allows conductor sizing without performing a thermal analysis on each new design. IPC-2152 provides new charts based on trace heating derived from testing in circuit boards. This offers a method for fine tuning charts into design-specific guidelines for sizing conductors, and provides a means of estimating design margins.

The method uses the linear aspects of heat transfer from the trace in a PCB to manage the local conductor temperature rise in the board. Each of several variables can be used to identify a decrease or increase in the temperature rise of a conductor by multiplying by a factor that represents each variable when compared to the baseline. The variables are copper thickness, board thickness, board material and copper planes. Another variable, which is suggested for users to investigate, is minimum allowable copper clad thicknesses and how they impact cross-sectional area for small conductors.

Baseline Test Vehicle

The baseline is a 0.07" thick polyimide test vehicle. IPC-TM-650, Method 2.5.4.1a specifies the baseline test configuration.2 Temperature rise data as a function of current are developed from multiple traces, multiple copper weights, in air and vacuum environments for comparison. These variables, as well as copper planes and board material, are considered when fine tuning conductor current carrying capacity guidelines.

The influence on temperature rise from a specific variable can be made using the results presented in IPC-2152. For example, Figure 4 shows the reduction in current necessary to achieve the same temperature rise when going from 1 oz. copper to 2 oz. copper and 1 oz. copper to 3 oz. at a specified cross-sectional area. Curves are shown for a 10° rise and 4°C rise relative to a 1 oz. conductor of defined cross-sectional area and applied current.

Board Material and Thickness

Data collected from test vehicles of different dielectric material (polyimide and FR-4) and board thickness (0.059" and 0.038") were used to compare against the baseline. In general, the small differences in thermal conductivity between the polyimide and FR-4 test vehicles had little impact on conductor temperature rise, although reducing board thickness from the baseline increases conductor temperature rise. Test vehicle thermal properties were measured and are included in IPC-2152. Factors are included in IPC-2152 to take into account board thickness.

Each variable was evaluated one at a time in a design of experiments (DoE) type matrix. The results are used to compare any one variable against the other. This permits conductor temperature rise estimates to be made for any design that differs from the IPC-2152 baseline. It also permits other parameters to be evaluated and used for comparison against the baseline, such as mounting configurations, forced convection and transient currents.

Significant testing was performed for all board configurations, except for boards with copper planes. A sample of copper plane data was collected and used for comparison, although a full complement of test data was not produced. Thermal analysis software tools were used to build models correlated to test data, and then used to create charts for estimating the influence of copper plane layers on conductor temperature rise.

The presence of thermal (copper) planes for heat spreading has one of the most significant impacts on lowering conductor temperature rise. Caution is recommended when using the copper plane charts. Parallel conductor rules change when taking into account the reduction in trace temperature rise due to the presence of copper planes. Before going into an explanation of the use of copper planes, a discussion on parallel conductors will be presented.

Parallel Conductors

Conductors side by side (Figure 5) are commonly thought of as parallel conductors. Many designers neglect the layer-to-layer aspects of sizing parallel conductors that would result from designs similar to the traces in Figure 6.

When sizing parallel conductors, the temperature gradient between conductors is considered. Conservative guidelines are recommended in IPC-2152, which states that if conductors are within 1" of each other, they are considered parallel. One inch is used because the influence from one conductor on another is small. Figure 7 shows an increase in conductor temperature, for traces sized for a 10°C rise, of only 2°C higher than expected. If the two traces had spacing of a few thousandths of an inch, the temperature rise of each trace would be 18°C, rather than the desired 10°C rise. The impact on temperature rise is compounded by increasing the number of traces that are not properly sized following the parallel conductor sizing rules specified in IPC-2152.

Increasing the spacing between traces reduces the influence on conductor temperature rise of one trace on the other. Figure 8 shows two parallel conductors, spaced 0.10" apart, each sized as single conductors. In this case, the temperature rise is a little more than 17°C, rather than the desired 10°C. Trace spacing must increase beyond an inch to not influence an adjacent trace. A compromise can be made by evaluating the gradient around the trace or using copper planes to evaluate margin in the design. The gradients around a trace are discussed in the parallel conductor section of the IPC-2152 Appendix. Figure 9 illustrates the temperature gradient around a single conductor sized to a 10°C rise.

When copper planes are introduced into the process of sizing conductors, the rules regarding parallel conductors expand to include all conductors under or above the copper plane area. The reason is that the copper plane (or any thermal plane, aluminum, composite, etc.) will thermally couple the traces that are in the vicinity of the plane/planes. Therefore, when using the copper plane chart, all conductors under the area of the plane need to be considered as parallel conductors.
When conductor sizing rules are followed is when the copper plane chart is best put to use. The copper plane chart is a tool for determining design margin. Figure 11, the copper plane chart, is used with the baseline charts to calculate a reduction in the conductor temperature rise resulting from the presence of copper planes. The curves show the reduction in conductor temperature rise as a function of distance from trace to plane and size of the copper plane. It is assumed that the conductors are centered on the plane. The coefficient on the Y-axis of the chart is a multiplier that is used with a delta T calculated using the baseline chart in IPC-2152. For example, a conductor estimated to have a 30°C rise calculated using the IPC-2152 charts will have a temperature rise closer to 9°C when a 2 oz. copper plane (5" x 5" [25 sq. in.]) is present in the design located 0.005" from the trace.

Ed.: This article was first published at IPC Apex in April 2010 and is reprinted here with permission of the author.

References
1. D.S. Hoynes, NBS (National Bureau of Standards) Report #4283 “Characterization of Metal-insulator Laminates,” May 1, 1956.
2. IPC-TM-650, Method 2.5.4.1a, “Conductor Temperature Rise Due to Current Change in Conductors,” August 1997.

Michael R. Jouppi is founder of Thermal Management Inc.; This email address is being protected from spambots. You need JavaScript enabled to view it..