Want the most bang for your buck on PCB purchases? Four industry veterans with backgrounds in PCB materials, chemistry, fabrication and assembly provided their expert advice, often echoing each other’s recommendations. If you want to maximize PCB quality, price, performance, delivery or overall value, try following some of these insiders’ tips:
Get a first-article inspection. Testing a preproduction sample is essential to determining if the fabricator can meet your quality requirements. As Mike Carano, global manager of strategic business development at OMG Chemicals, explains, “I see many fabricators fail badly when making a new part number. Not because the company is not of high quality, but because they actually lack experience with the design and material sets in question.” He suggests asking the fabricator to build test coupons to measure registration, via formation and PTH reliability.
Get pricing up front. The bottom line is exactly that – the bottom line. A myriad of factors go into PCB pricing, so it’s best to know if the fabricator can meet cost goals before you invest time and money checking quality or visiting facilities. For help determining fair pricing, download a PCB cost/sq. in. calculator (pcgandg.com/Pricing__The_Smoking_Gun.html).
If pricing seems reasonable, Erik Bergum, industry veteran and former chair of the IPC Base Materials Committee, advises giving it a closer look. “PCB purchasers should know the setup and lot charges for tooling and test, and understand which charges recur and which ones don’t,” he says. “Before issuing the initial PO, capture the cost and delivery timing for the first set of boards and for the subsequent sets.”
Always check the fab drawing. This is the place where materials, finishes, plating and any special directions are communicated. Pay attention to these callouts. Chrys Shea, PCB assembly expert and president of Shea Engineering Services, advises, “If you have qualified a particular material for storage, processing or reliability reasons, make sure the words “or equivalent” do not appear in its callout. Those two words invite unwanted substitutions that will likely disappoint.”
In some cases, especially when expensive metals are involved, more specificity is recommended. If ordering ENIG final finish, Carano suggests explicitly stating the following requirements: 150-220 microinches of nickel, with 150 as the stated minimum, and 1 to 2 microinches of gold. He also suggests calling out a minimum plating thickness of electroplated copper in barrels of 0.0008" or 20 µm, explaining that “anything less should be cause for rejection. The 0.0008" minimum is derived from hundreds of thousands of hours of reliability and field data. This is how we build reliability into the hole.”
Check UL certifications online. Go to ul.com and look in the lower right corner of the header for a button labeled “Certifications.” Clicking it will bring up the online certifications library, where you can look up the fabricator’s UL certifications. If you can’t find a fabricator, or if they are not certified to manufacture the narrowest conductor width on your board, contact them to resolve the discrepancy. If your PCB distributor holds the certification instead of the fabricator, you should understand that as well. You have the right to know who manufactures your circuit boards and the UL stamp source.
Ask for dummy boards. Also known as X-outs, electrical test failures, profile boards or solder samples, bare PCBs with quality problems that cannot be assembled and sold are great for profiling, pick-and-place tuning, process verification, or other engineering experiments on the assembly floor. How to get them? Just ask. As Tech Circuits senior applications and quality engineer Lee Starr explains, “Like all manufacturing processes, PCB fabrication is subject to yields that are typically based on design complexity. When a fabricator begins a lot of PCBs, they start more boards than the order calls for, based on their estimates of expected yield. While good boards are shipped to the customer, bad ones are reclaimed with little value to the fabricator. NPI engineers routinely ask for them, but production shops usually don’t.”
Shea adds, “During the production life of a circuit assembly, it can be built on different assembly lines, in different factories, or even in different parts of the world. Due to considerable variation among reflow oven performance, an assembly should get reprofiled each time it is run on a new line, but this doesn’t always happen – often due to cost constraints. The availability of profile boards at zero cost to the assembler vastly increases the odds of the assembly getting profiled and reflowed properly, minimizing solder defects and improving overall reliability.”
Don’t overspec it. If a little is good, a lot is better, right? Wrong. Adding an unnecessary “safety margin” to material properties may create unexpected issues. Bergum warns, “If you overspecify critical properties such as glass transition temperature (Tg), degradation temperature (Td) or Z-axis expansion, you may find that the specialized materials often have sensitivities to processing, handling or storage that may negatively impact yield or cost. Your best bet is to specify materials that meet your performance criteria, and address any questions or uncertainties directly with the fabricator or laminate supplier.”
Don’t overdesign the board. While designers may be very good at electrical design and layout, they are not necessarily good at understanding the interactions of materials and machines, and plating limitations. Carano advises a DfM review by the fabricator to identify opportunities to reduce costs or improve yields. Starr seconds that opinion, offering, “If using a new technology such as 0.3mm BGAs, get advice ahead of time on layer interconnect strategies, target and capture pad sizes, fine lines and spacing. This will ensure producibility at multiple suppliers and help keep the design cost-competitive.”
Don’t “design for panelization.” Designers often make assumptions about vendor panel size, and in an effort to manage unit cost, set the dimensions of individual PCBs to maximize the number of pieces that can be fit onto each panel. While their intentions are good, they may be disappointed to find their efforts are in vain.
Starr explains: “If multiple lamination cycles are required, the usable space on the panel becomes limited. The stretch and shrink of each heat/pressure cycle creates dimensional instability that can cause misregistration near the edges of the panel. As the number of laminations increases, the size of the ‘sweet spot’ in the middle of the panel decreases. The fabricators’ CAD department accounts for this when they perform the panel layout, using as much of the sweet spot as they can for each design, but avoiding areas around the periphery that might cause quality problems. Also, panel sizes vary in offshore fabricators, so the shop’s location becomes a factor. Designers get frustrated when they find out they compromised their desired PCB size or certain design characteristics to accommodate a panelization layout, and their noble efforts were all for naught. Their best bet is to design the single PCB they want, and refer panelization and cost-reduction opportunities to the fabricator’s CAD team for expert guidance.”
Don’t expect high quality just because the shop has ISO 9001 certification. ISO certification means the business’ processes are documented. It doesn’t guarantee high-quality output from the operation. All it guarantees is that almost everything done in the operation is written down somewhere, and an auditor spot checked multiple areas to see how well the records reasonably matched the actual processes.
Certification indicates that a shop has a quality system in place, and everyone agrees that’s a good thing, but they also agree that quality output depends on a great deal more than just the presence of a system. It should be considered a minimum requirement of any new supplier, but certainly not the only one.
Don’t try to cut costs by cutting the PCB broker out of the loop. Broker/distributors combine the purchasing power of multiple clients, so they often have more leverage with fabricators than singular buyers, especially with offshore fab shops. And while it’s true that brokers turn a profit as they turn your PCBs, odds are you will pay a lower unit price than if you go it alone. Plus, brokers’ leverage extends beyond pricing: You can often receive better quality, delivery and response to last-minute changes by sourcing through their established supply network.
Regardless of where you sit in the supply chain, these tips are fairly universal. And although each is targeted to a specific goal of improving cost, quality or reliability, in the end they all help meet the overriding goal of any business: profitability.
Au: Many thanks to Mike, Lee, Erik and Chrys for sharing their expertise and insights.
Marissa Oskarsen, aka The Printed Circuit Girl, owns E-TEC Sales (pcgandg.com); This email address is being protected from spambots. You need JavaScript enabled to view it..
An upcoming conference attempts to make sense of a fast-changing industry.
Yes, a provocative headline, intended to grab your attention. But we do have a serious point to make, so please stay with us.
When taking a long view, and considering momentous events such as war, famine, the rise and fall of empires, the invention of Facebook, and Simon leaving American Idol, the times we live in are perhaps no more or less significant than any other. Yet the impact of momentous events on the electronics industry is far more substantial and immediate than even a decade or so ago. Global events have a far deeper impact because so many of the world’s economies and business environments, currencies and marketplaces are inexorably linked. This is new. Off the top of our collective head, we can name five areas where unexpected and uncontrollable things happen to change the world as we know it almost on a daily basis:
Energy. Developing and developed countries without domestic sources of energy, and developed ones that choose to purchase from unstable regions rather than bear the potential negative environmental impact, create increased interdependence. When protests paralyze the Middle East, with astonishing speed, we feel it in fuel prices in every corner of the world. Instantly, an outsourced supply solution based in a region in another hemisphere becomes catastrophically expensive for lower volume products.
Components. Nearly the entire component base is now in China. The tragedy in Japan has generated a kneejerk response among participants engaged in panic buying and hoarding, driving the industry to a new low. This will create havoc for the next few quarters for a small number of SKUs. What happens when/if China experiences a meltdown of some sort? Do you have rational contingency plans in place?
Currencies. Since World War II, the US dollar has been the world’s reserve currency. This was intended to create stability. However, every sovereign nation will act in its own best interest, and the world is watching Washington with increasing alarm. Currency issues impact global economies, and tracking the implications is of vital importance for all businesses, not just the multinationals.
Financial markets. Automated trading designed by brainy financial wizards has taken over Wall Street and other global exchanges. What once was a way for businesses to access capital from (mostly private) investors for the purpose of growth has become a casino. By some estimates, high frequency or algorithmic trading is up to 80% of the daily volume. The flash crash, where the stock market lost over half its value in about three minutes, then recovered soon after (a wildly under-analyzed event), is the type of thing that happens when robots control the capital markets. When will the next flash crash occur, and how will your business be affected?
Mother Nature. You can’t predict disaster, but preparation and planning enables a humane and rational response when something bad happens, puts what’s really important into perspective, and helps us all remember that our industry is supposed to change the world for the better, not exploit events for personal greed.
What does this all mean? It means that beyond the normal competitive arena within market sectors and technologies, there is a level of global business intelligence that every professional must access to stay viable. In times past, when communications were not instantaneous, everyone was more or less in the dark about events, unless immediately affected. That was a level playing field, but it just isn’t the case today. If your competitor gains insights about something of vital importance to your business, and you don’t know about it, you are at a huge disadvantage.
Few persons have the luxury to stay on top of all these things. More often, industry executives are doing the work of six people.
That’s why CBA has fashioned a quarterly conference built around assessing and making sense of micro and macro trends and how they relate to electronics manufacturing businesses. We track dozens of key industry indicators, and we update our extensive database each quarter. We look at the implications of global events on the complex, risky, high-velocity, far-flung global supply chains that are too often the norm in nearly every industry sector, from midmarket to the top tiers. What happens in one section of this many-headed beast is felt throughout the organism, and we see the impact long before the news reaches the industry press.
On June 14-15 in the Chicago area, we will host an event where we discuss these sorts of issues with other experts and develop strategies to navigate these dangerous shoals. Yes, the world as you know it will end tomorrow. In its place will be a different world with countless new opportunities and challenges. Come to Chicago and let’s talk about how to succeed in this new world.
Ed.:CIRCUITS ASSEMBLY Editor in Chief Mike Buetow will moderate a panel on the future of EMS at the Outsourcing Navigator Council meeting in June. For information on the Outsourcing Navigator Council meeting, visit www.charliebarnhart.com.
Jennifer Read is cofounder and principal at Charlie Barnhart & Associates LLC (charliebarnhart.com), a consulting company serving the electronics manufacturing industry; This email address is being protected from spambots. You need JavaScript enabled to view it..
Industrial Health Evaluation of Employee Exposures at a PCB Plant A confidential employee request for a Health Hazard Evaluation (HHE) at an electronics manufacturer specializing in PCB fabrication and assembly explains how third-party audits are initiated and reviews best-in-class controls for maintaining factory worker health. by Srinivas Durgam, Chandran Achutan, Ph.D., Carlos Aristeguieta, M.D., and Maureen T. Niemeier
DfT Smoothing the Layout to Test Flow When layout and test take place under the same roof, determining the right strategy to increase test coverage for a given product becomes much easier, and ensures the end-product will be successfully tested. by Zulki Khan
A review of the signal integrity demands of digital and analog components.
An endless variety of software tools exist to ensure signal integrity at the board level. The critical tool, however, is careful evaluation of considerations to maintain PCB signal integrity.
Take the power supply, for example. A misstep or two here can have adverse effects on the board, and subsequent problems when that design undergoes EMC compliance. If digital high-speed signals aren’t correctly routed, they can cause jitter or, worse, a device’s complete malfunction. Analog devices, especially those with low-end amplitude analog signals, pose another problematic scenario. Those signals are extremely prone to noise. If digital noise seeps into them from the planar capacitance located between digital and analog planes, those analog devices won’t function properly.
What follows are the key considerations for signal integrity, using a high-speed design as an example (Figure 1).
The first step is to review board requirements by checking out the schematics or “A” document that relates to the OEM’s layout. The crucial data to be clearly identified here include critical signals, digital and analog sections, low amplitude analog sections, high frequencies, low-voltage essential signals (LVES), and high-frequency clocks.
After completing the PCB library and importing the netlist, preliminary component placement is performed based on customer input, the various application notes and component datasheets, combined with layout engineer’s expertise. At this point, isolate the critical areas involving analog and digital ICs, FPGAs and connectors that need to be placed at specific locations.
Reviewing the stackup is the second step. The stackup is the difference between a highly efficient design with low noise and EMC compliance versus a poorly designed board. An effective stackup relies on certain factors. First is specific board thickness; it cannot be any less or more than the specified maximum thickness. For example, a compact PCI card calls for maximum board thickness of 0.062" because of connector constraints.
The second is the minimum number of layers required for routing; that is typically governed by FPGA depth. The third factor is the impedance requirement on the layout. The thickness requirement can be like the typical 50Ω, 65Ω for PCI and 100Ω for differential signals, as well as sometimes 75Ω for video outputs. The most typical are 50Ω and 100Ω. Basically, 100Ω differential is equivalent to 50Ω single-ended.
Power and ground plane requirements are the next factor to consider. It’s known that a reference plane is required for impedance control signals. An ample amount of ground planes meet these particular signals, and they should be unbroken with no voids or splits. The next factor is the number of power planes that depend on the power requirements of the board.
Then, the PCB layout engineer determines if there is a planar capacitance requirement. In recent times, greater numbers of designs require planar capacitance, which is capacitance between the power and ground planes (Figure 2). Here, power and ground planes are stacked next to each other with an extremely small dielectric between them, for instance 0.003" to 0.005". This provides a blazingly fast switching planar capacitance on the board, and it reduces the requirement for many decoupling capacitors on that particular board.
The type of board material is the last, but not the least, factor associated with stackup. Materials such as FR-4 and its equivalents can be used for up to 5GHz with little or no problems. Higher rise times call for the use of the more exotic materials like Nelco’s and Rogers’. The reason: They have a low dielectric constant (Dk) value, which provides for faster signaling and low dielectric losses. However, there are cases where OEMs specify FR-4 at even higher speeds. A major recommendation in this regard is for those OEMs to add filtering to the signals to compensate for the Dk inconsistencies that FR-4 produces.
The actual weave of the material also requires special attention. Weaves come in different types: For example, version 106 is tailored for extremely low speed, while 1080 is an exotic material designed for extremely high speed. The difference is that the high-density 1080 glass weave provides for more constant, uniform dielectric all over the board. It is highly desirable to maintain this uniform dielectric, especially for high-speed signals. Without a uniform dielectric, skews are created. But there are compromises between these two material weaves, such as a medium woven glass style like 2116. It is not very exotic or overly expensive, but acceptable for high-speed signals.
The factors described above are the ones affecting stackup. Once the stackup is created, it is sent to the printed circuit board fabricator, which verifies it has all necessary materials in-house. At the same time, the layout designer works with the fabricator to work up the trace geometry details based on the impedance requirements on the board.
The Layout
Layout continues once the necessary data come from the fabricator. At this point, take a close look at the skin effect associated with extremely high-speed traces. The higher the speed, the more skin effect there is. To counter this problem, gold plating is used on the high-speed traces and pads, which needs to be specified on the fab drawing.
Laying out the power supplies is the first step. A good idea is to identify all the power supplies on the board, create small blocks of power supplies, and precisely follow manufacturer’s guidelines and switchers’ datasheets. Switchers are extremely noisy, and most of the noise on the board is due to the power supplies; hence, they should be dealt with first. Power supplies switching nodes need to have very low inductance. Also, feedback traces on the power supplies should be very clean and placed away from these switching nodes.
Once the power supply layout is completed, then the isolation of analog and digital signal starts. That is done during placement as well as routing, so it is an ongoing process during the entire layout phase. At this juncture, digital-to-analog converters (DACs), analog-to-digital converters (ADCs), clock circuitry, and FPGAs are placed, and the power supplies should be isolated by placing them on one of the edges or corners.
Think about the traces not just in terms of routing, but also visualize the returns. While returns are not yet specified as signals, visualize they are going through the ground planes as returns. When a ground plane is created, it must be split between separate analog and digital sections.
Power planes are the next consideration. Isolation between analog and digital power rails and between digital ground and analog ground is recommended. If any of the digital power or ground overlaps with the analog power or ground, it will cause capacitive coupling, which can cause digital noise to be transferred into analog traces. Figure 2 shows how an overlap between digital and analog planes can induce noise.
Proper placement of decoupling capacitors is a next step to ensure signal integrity. They must be placed near the IC power and ground pins and connected to a very low inductance trace, both with the pin and to the ground plane through a via. By doing this, ground bounce and VCC sag are avoided during switching. During switching, current can flow through ground traces, hence the need to have a low inductance to the power and ground plane. Also, it helps considerably when planar capacitance is added.
Still another key consideration is proper decoupling capacitors for BGAs. It is recommended that decoupling caps be placed right on the opposite side of the BGA right below the pin itself (Figure 3). Therefore, BGAs will be fanned out with a via that is on the pad. It’s filled either with a conductive or nonconductive filling. Some manufacturers recommend the use of a nonconductive filling because it provides a surface that is more flat after the plating. Vias are placed shut and have a flat finish on the topside. At the opposite side of the BGA, on the bottom side, are the decoupling caps. This provides a low inductance path from the BGA to the power system.
If an FPGA is used in this high-speed design, I/O optimization is necessary before routing is started. This option can be considered either in the layout or in the schematic, and is performed to optimize those signals, because most of those data pins are pin swappable. The schematic designer can switch those I/Os, and once the net list is re-imported, a cleaner view of the rat’s nest can be achieved. Consequently, routing becomes simpler and clean once those signals are routed.
Syed W. Ali, C.I.D+, is a PCB layout engineer at Nexlogic Technologies (www.nexlogic.com); This email address is being protected from spambots. You need JavaScript enabled to view it..
The electronics manufacturing industry will remember 2010 for many reasons: rampant component shortages (and the rise of counterfeits), the tight financial markets and tense end-market conditions.
But mostly, it will remember 2010 for the long-awaited recovery.
EMS shook off the doldrums of 2008-09, demonstrating tremendous resilience and yes, patience, as demand easily outstripped supply throughout the calendar year. It also showed it remembered the lessons from 1999 to 2001, where unprecedented OEM demand led to acquisition sprees and six-month order lead times. It took two years for that hangover to end.
Not this time.
Expansion occurred, of course, but it was targeted. Even Foxconn, which announced or opened several sites in China during 2010, didn’t bring on capacity so much as it relocated it inland from the Shenzhen area, where inflation and negative attention coupled with a parade of worker deaths made the “Walled City” environs even more uncomfortable than usual. Most followed the lead of companies like Zollner, which expanded two plants in China, but left the rest of its footprint as is. Acquisition activity was also held in relative check. The big deal of the year was Sanmina-SCI’s purchase of Breconridge (No. 48 in last year’s revised Top 50). Smaller deals abounded, but were generally on the order of the MC Assembly’s pickup of Chase Corp.’s EMS operations or ElectronicNetwork’s snatching of Görmiller from bankruptcy, tidy deals that were quickly accretive and added 10 to 15% in revenue to the balance sheet but didn’t do much insofar as moving the needle on the CIRCUITS ASSEMBLY Top 50 chart.
Falling off the Circuits Assembly Top 50 this year was Hitachi Computer Products, as expected, as the Oklahoma site ceased taking outside orders to concentrate on its parent company’s production needs. Jumping in were a handful of firms that were unintentionally omitted in 2010. They include Japan’s UMC Electronics and Hong Kong’s PC Partner, Topscom and Fittec.
Currency fluctuations did not have a profound effect on this year’s results, as most of the major currencies were fairly stable with last year, trading in a band of 3 to 5 percentage points. The exception was the Japanese yen, which had fallen 9.5 points against the dollar from Feb. 1, 2010 to Feb. 1, 2011, the date used for the conversions (Table 1).
While the big clearly got bigger, the middle class acquitted itself nicely (Table 2). No. 30 Eolane finished 2010 with 268 million euros in revenue, up 72% from 156 million euros last year. No. 19 Fabrinet (the early leader for 2011’s CIRCUITS ASSEMBLY EMS Company of the Year) shot up 72% as well on demand for optical networks. No. 38 Neways was up 27%. In North America, military/industrial suppliers On Core and Victron each grew around 20%.
[Ed.: To enlarge the table, right-click on it, then click View Image, then left-click on the table.)
There was little change among the top 10 companies from 2009. Foxconn remains the clear-cut leader, well ahead of No. 2 Flextronics, which lost ground despite growing its EMS sales by $3.5 billion last year. No. 3 Jabil (up 23%) extended its lead over the rest of the pack, and management has plans to top $20 billion within four years. No. 5 Sanmina’s aforementioned acquisition of Breconridge helped it close the gap with No. 4 Celestica. Benchmark rose two spots to seventh and No. 10 Siix leveraged a huge year (up more than 35%) to displace Elcoteq, last year’s No. 7, from the Top 10. Venture, last year’s No. 8, slipped one spot.
The 2009 recession lowered the bar for entry into the Top 50. The cutoff for last year’s revised list was almost $200 million. 2010 changed that. For this year’s list, the cutoff was about $263 million, leaving worthy companies such as KeyTronic EMS out of the chart.
Still, the rising tide did not lift all regions, let alone all ships. While North American and Asia generally rebounded, the EMS industry in Europe continued to list. Kitron, Scandinavia’s third-largest EMS after Elcoteq (which is based in Luxembourg in name only) and PartnerTech, suffered through component shortages, plant closures and management changes. After eight straight quarters of losses, No. 11 Elcoteq turned profitable in the first quarter of 2010, and in the June period broke a streak of six consecutive quarters of falling revenue. Still, the third quarter saw lower sales and more losses, leaving the company-estimated sales down 30% for the year; the firm dropped out of the Top 10. On the other side of Eurasia, Hong Kong’s Alco’s revenue slid 33% from last year, and its ranking fell likewise (to No. 24 from No. 16).
By country, the US remains the home to the largest share of the biggest players (Table 3), with 12 entries, one less than in 2009. Hong Kong rose by two, to seven, the result of two omissions from last year’s Top 50. Canada lost an entry to an acquisition. The UK, once home to powers like MSL, was left without a single entry.
Of course, for many companies, the “home nation” is more a formality than a reality. For Foxconn, Flextronics, Beyonics, GBM, and several others, China is their largest footprint. Fabrinet is headquartered in San Francisco, but the vast majority of its factories are in Thailand. Given the violent uproars in the Middle East and much of Africa, it is safe to say there won’t be any new EMS facilities in those regions soon. As such, Table 3 will likely be very similar next year as well.
CIRCUITS ASSEMBLY is not the only entity that tracks the top EMS players. So why does our list occasionally disagree with those of other industry watchers? One reason is that we make our best effort to count only the revenues derived from EMS sales. Thus, companies like Foxconn, Flextronics, Hana Microelectronics, OSE, Sumitronics and Sanmina-SCI appear tens of millions and sometimes billions of dollars smaller than they truly are. Our belief is this gives a truer picture of the actual EMS sales, as opposed to revenue from connectors, bare boards, sensors or other unrelated components.
A few words about Foxconn. Although it is undisputedly the world’s largest ODM/EMS player, Foxconn is almost inscrutable. Most industry watchers know it is a major supplier to Dell, H-P, Sony and, of course, Apple, but plenty of smaller OEMs use its services too. Besides EMS, it is one of the world’s largest bare board fabricators – sales reportedly are somewhere between $700 million and $1 billion – and is among the top 10 in connectors too.1 It is quickly becoming a major supplier of LCD screens (which suggests Apple TV is not far off), and is headed toward a top 3 position in branded motherboards. Some rumors about the company are occasionally so off-the-charts outlandish, such as one making the rounds last fall suggesting Foxconn would invest $10 billion (not a typo) in a plant in Chengdu, China, that it’s a wonder how they get published.
But there’s the rub. Though public, Foxconn is traded on the Taiwan Stock Exchange, whose standards are relaxed relative to other major exchanges, and accordingly, the company-reported data are incredibly vague. What would seem its primary website, foxconn.com, hasn’t been updated in months. Its subsidiaries, such as cellphone ODM unit Foxconn International Holdings, sometimes have related names, but other times they don’t (witness Q-Run and Hongfujin Precision Industry Co.). And its subsidiaries have subsidiaries: Hongfujin reportedly is China’s largest exporter and has at least 60 other companies under it, which combine for roughly $30 billion in revenue.2 It has begun to open retail stores in China under the name Cybermart; it’s unclear how much revenue the 35 or so sites have generated thus far, but given Foxconn’s size, it’s unlikely to be material. Is Foxconn as large as the figures claim? It says here, no. But very few people can know for sure.
References
1. Ron Bishop, “The Top 10 Connector Companies,” ConnectorSupplier.com, August 2010. 2. Ling Ruiming, “Foxconn Faces Tough Competition from Rivals,” China Daily, Nov. 30, 2009.
Mike Buetow is editor in chief of Circuits Assembly; This email address is being protected from spambots. You need JavaScript enabled to view it..
Ed.: Due to a currency translation error, Team Precision is incorrectly listed in the Top 50. Team Precision's actual calendar 2010 revenue was about $71.3 million. SMTC, at $262.6 million, should have been ranked 50th. Also, due to a spreadsheet miscalculation, VTech EMS' revenue was initially incorrectly calculated. We regret the errors.
Problems related to conductive pastes as fillers have led to the development of electrolytes.
To etch fine conductive patterns (75 µm lines/spaces) of the panel plated copper without excessive underetching, the total copper thickness (Figure 1) before etching must be correspondingly low. While copper thickness can be reduced by performing one or more copper thinning cycles, as shown in Figure 2, this increases costs and reduces productivity.
Productivity can be increased and costs reduced by eliminating the copper thinning step or, at least, reducing the number of copper thinning cycles. To permit this, the total thickness of the copper layer (Cu laminate + Cu strike layer, if present + Cu blind microvia filling) on the PCB must be reduced. A number of PCB manufacturers therefore specify a maximum copper layer thickness of 25 µm. This means that only approximately 18 µm of copper may be deposited on the PCB surface during the blind microvia filling process step. Besides the advantages in terms of productivity and costs, this also implies less waste of material because less copper has to be plated and etched subsequently.
Processes for blind microvia filling by copper electroplating have been used in volume for a number of years, principally in Asia. To achieve the required coating properties, these processes use high-leveling sulphuric acid copper electrolytes containing organic bath additives alongside copper sulphate, sulphuric acid and chloride. Several types of blind microvia filling electrolytes are now commercially available from a number of suppliers. The various processes differ in the following areas:
Organic additive system.
Anode material (copper anodes or insoluble anodes).
Applied current form (direct current or reverse pulse plating).
Type of plating line used (standard vertical, vertical
continuous or horizontal continuous).
Applicable current density.
A typical filling result achieved with current generation electrolytes results in a plated copper thickness of 22.7 µm, exceeding the limit of 18 µm required for 75 µm/75 µm lines and spaces. To meet this limit, new electrolytes offering improved filling performance needed to be developed. The objective is to deposit less copper onto the surface of the PCB than previously, while achieving at least comparable filling. This is often referred to as “superfilling.” In addition, plating times must not be longer than in established processes, and continued use of present plating equipment should be possible.
Figure 3 shows the filling achieved with this new electrolyte in a blind microvia with dimensions of 100 µm θ and 65 µm depth. Copper thickness was reduced from 22.7 µm to 10.7 µm for a plating time of 60 min. at a current density of 1.5 A/dm2. The dent is 7.6 µm.
The novel electrolyte significantly reduces copper thickness, while also achieving a slightly better filling. (The dent is shallower.) The plating time was shortened by 8 min. In addition, the novel electrolyte can be used in the same plating plant as its predecessor and does not require any alterations to equipment.
The performance of the novel electrolyte will first be demonstrated for the requirements dent < 10 µm and copper thickness < 18 µm. PCBs (size: 500 mm x 400 mm) with blind microvias (Ø: 100 µm, depth: 80 µm) were copper-plated in a 1400-litre test module equipped with insoluble anodes. This test module is identical in construction to the electroplating module of a vertical continuous plating line introduced into market a few years ago. Unless otherwise stated, all tests were carried out using PCBs that were treated with electroless copper.
Figure 4 shows the filling achieved after plating for 75 minutes at 1.2 A/dm2. The blind microvia is completely filled with copper; the copper thickness is 15.8 µm, and the dent is 0 µm.
The filling achieved with these parameters is excellent, but at a current density of 1.2 A/dm2, productivity is insufficient. Completion of blind microvia filling within a maximum of 70 min. was therefore requested. In the subsequent test, plating time was reduced from 75 to 60 min., and current density increased from 1.2 to 1.5 A/dm2, so the same amount of electric charge was available for copper-plating in both tests. Figure 5 shows that complete blind microvia filling was achieved, even with a shorter plating time of 60 min. The dent increased from 0 µm to 9.5 µm, while the copper thickness remained practically unchanged. This result shows the new process is able to fulfill the requirements regarding dent and copper thickness outlined above.
Figure 6 shows the filling result achieved when a copper strike was applied. With a copper strike, the dent is reduced from 9.5 µm to 6.3 µm.
The pre-reinforcement of the conductive layer (electroless copper or direct metallization) with an electroplated copper strike is an ideal base layer for subsequent filling. A thin copper layer with a thickness of only 2 to 5 µm is sufficient. Appropriate pre-treatment (e.g., acid cleaner) produces an active copper surface that facilitates a very quick onset of the blind microvia filling. With all other parameters unchanged, this results in an improved filling. Application of a copper strike frequently permits blind microvia filling to be carried out at higher current densities, leading to shorter plating times. In the tests described herein, the copper strike was produced using an electrolyte used for copper plating blind microvias in volume PCB production.
If lower requirements for blind microvia filling (e.g. dent < 25 µm) and copper thickness (e.g. copper thickness < 25 µm) are possible, very good results can be achieved with the new electrolyte, even with short plating times and high current densities. For blind microvias (Ø: 100 µm, depth: 80 µm) a dent of 13.3 µm, a copper thickness of 22.3 µm is achieved with a current density of 2.0 A/dm2 and a 55-min. plating time (Figure 7a). Increasing the current density further to 2.5 A/dm2 produces a dent of 20.9 µm and a copper thickness of 23.3 µm over a plating time of only 45 min. (Figure 7b).
The new electrolyte can also produce a good filling in large size blind microvias. These have a larger volume, meaning more copper is required for filling, and the plating time for a current density of 1.5 A/dm2 needed to be prolonged to 90 min. For a blind microvia (Ø: 100 µm, depth: 100 µm), a dent of 4.4 µm and a copper thickness of 24.6 µm was achieved (Figure 8a). For a significantly larger blind microvia (Ø: 150 µm, depth: 100 µm), a dent of 20.2 µm and a copper thickness of 23.7 µm could be achieved (Figure 8b) using the plating parameters as mentioned above.
Direct metallization. The new blind microvia filling electrolyte can also be used for PCBs that have been treated with direct metallization. Figure 9 shows the filling achieved on a PCB treated using a graphite-based direct metallization process. However, with unchanged plating parameters, slightly worse filling was achieved compared to the PCB treated with electroless copper (Figure 5).
Copper strike deposition improves blind microvia filling considerably, even on PCBs treated with direct metallization. Figure 10a shows a blind microvia (Ø: 110 µm, depth: 60 µm) in a PCB treated with graphite-based direct metallization after deposition of a copper strike. It is clearly apparent that the copper strike was not deposited conformally, and that the copper thickness is greater in the area of the capture pad/dielectric transition. In combination with the active surface of the copper strike, this geometry provides ideal conditions for subsequent blind microvia filling and permits a higher current density and shorter plating time to be used. Figure 10b shows very good blind microvia filling after deposition at 1.9 A/dm2 over 50 min.
Pattern plating. The novel electrolyte can also be used for pattern plating (Figure 11), but few experimental data are currently available.
Through-hole plating. The novel electrolyte can also be used for plating through-holes (Figure 12). However, it should be noted that good throwing power between 70 and 100% can only be achieved with thin PCBs and low aspect ratios. As with pattern plating, few experimental data are currently available. Alongside electrolyte and plating parameters, the blind microvia filling result is also strongly dependent on the size and shape of the unfilled blind microvias. The best filling results are achieved with conical blind microvia shapes. However, blind microvia shapes encountered in practice often deviate significantly from this ideal. Depending on the dielectric type and the laser drilling parameters, recessions can result (see circles in Figure 13aand b).
The new electrolyte for blind microvia filling also permits overhangs and recessions to be filled with copper without defects (see circles in Figure 14). A copper strike was used in this case.
Reliability. The reliability of electroplated copper layers is an important quality criterion in PCB production, and appropriate reliability tests must be performed on an ongoing basis. The copper layers deposited using the novel electrolyte exhibit an elongation of about 20% and pass the reliability tests in Table 1.
The electrolyte is made up with copper sulphate, sulphuric acid and hydrochloric acid, and contains three organic bath additives alongside the inorganic ingredients. The concentration ranges of each of the electrolyte components are in Table 2. To ensure a good blind microvia filling, it is quite common that the copper ion concentration in blind microvia filling electrolytes is significantly higher in comparison to other copper electrolytes for PCB production.
The methods used for analysis of the individual electrolyte components are summarized in Table 3. The leveler content of the electrolyte can be evaluated by plating a Hull cell panel. A cyclic pulse voltammetric stripping (CPVS) method for leveler analysis is currently under investigation.
Operating conditions. The main operating conditions for the new electrolyte are shown in Table 4. The electrolyte is used under direct current conditions and with insoluble anodes at a maximum temperature of 22°C. Replenishment of copper ions is performed by dissolution of copper oxide in a separate dissolving unit and subsequent addition to the plating tank. It is preferable to operate the electrolyte in a vertical continuous plating (VCP) line. This equipment combines the advantages of horizontal continuous plating lines with those of standard vertical plating lines. The electrolyte may also be used in standard vertical plating equipment, but VCP lines generally produce somewhat better results.
The novel electrolyte for blind microvia filling has been used in a VCP line in mass production of PCBs (line/space 75 µm/75 µm respectively 60 µm/60 µm) for about nine months. Filling of blind microvias (Ø: 110 µm, depth: 60 µm) is carried out at a current density of 1.5 A/dm2 over a plating time of 52 min. The dent is less than 10 µm. The resultant copper thickness is approximately 15 µm, and this can be reduced to the final thickness required for the subsequent tent and etch process by a single copper thinning cycle.
Before the new electrolyte was available, its predecessor was operated in the same plant. Using this previous electrolyte, complete blind microvia filling was achieved with the same current density of 1.5 A/dm2, but a plating time of 68 min. However, the copper thickness achieved was approximately 20 µm, requiring the copper thinning process to be repeated multiple times.
Thus the new electrolyte permits both the blind microvia filling process and copper thinning process to be carried out more quickly.
Summary
The superior filling performance of the new electrolyte permits blind microvias (Ø: 100 µm, depth: 80 µm) to be completely filled with electroplated copper (dent < 10 µm), while producing a lower copper thickness (< 18 µm) on the PCB surface. This enables blind microvia filling and line/space 75 µm/75 µm respectively 60 µm/60 µm via tent and etch process without requiring multiple copper thinning cycles. This increases productivity, reduces costs and leads to less waste of copper. In case of lower dent and copper thickness requirements, blind microvias (Ø: 100 µm, depth: 80 µm) can be completely filled with copper over even very short plating times. Even very large blind microvias (Ø: 150 µm, depth: 100 µm) can be completely filled with copper over reasonable plating times.
The new process can also produce HDI PCBs treated with graphite-based direct metallization processes. A copper strike can be applied to increase the filling further, both with direct metallization and with electroless copper.
The electroplated copper layers meet the common reliability test requirements for PCBs.
Experience with the electrolyte in mass production of HDI PCBs to date shows that the new electrolyte permits stable and reliable blind microvia filling.
The electrolyte can also be used for pattern plating and through-hole plating, but only a small amount of experimental data is currently available.
Acknowledgments
The author would like to acknowledge the support of AGES Group (Taiwan), and particularly Albert Yeh, in this project.
Bibliography
1. T. Teng, “iSuppli Issues Fast Facts on Latest iPhones,” June 7, 2010. 2. J.W. Stafford, “Semiconductor Packaging Technology,” Printed Circuits Handbook, 5th edition, McGraw-Hill, 2001, pp. 2.1 - 2.22. 3. C.F. Coombs and H.T. Holden, “Electronic Packaging and High-Density Interconnectivity,” Printed Circuits Handbook, 5th edition, McGraw-Hill, 2001, pp. 1.3 - 1.22. 4. M. Carano, “Electrodeposition and Solderable Finishes for HDI,” The HDI Handbook, 1st edition, ed. by H. Holden, BR Publishing, 2009, pp. 355 - 397. 5. H. Holden, “The HDI Manufacturing Processes,” The HDI Handbook, 1st edition, ed. by H. Holden, BR Publishing, 2009, pp. 231 - 257.
Ed.: This article is adapted from a presentation at SMTA International, October 2010, and is published with permission of the author.
Michael Dietterle, Ph.D. is with Max Schlötter GmbH (schloetter.de); This email address is being protected from spambots. You need JavaScript enabled to view it..
