CAMBRIDGE, MA -- In today’s computers, moving data to and from main memory consumes so much time and energy that microprocessors have their own small, high-speed memory banks, known as “caches,” which store frequently used data. Traditionally, managing the caches has required fairly simple algorithms that can be hard-wired into the chips.
ESPOO, FINLAND -- Optenni and Ansys have created a link for designing matching circuits for antennas and other RF components based on simulated 3D models. The models are simulated using Ansys' HFSS electromagnetic field simulation software.
SANTA CLARA, CA – Agilent Technologies is offering a book on signal integrity characterization techniques.
DETROIT -- SAE International will host a free telephone/webcast on Oct. 10 to clear up misunderstandings among users and to explain differences between the organization’s standards governing counterfeits.
WILSONVILLE, OR -- Mentor Graphics today announced full interoperability between the Tessent IJTAG chip-level IP integration product and Asset InterTech’s ScanWorks platform for embedded instruments, which includes chip, circuit board and system-level IJTAG tools. This combination of capabilities delivers a chip-to-system-level automated IJTAG IP integration solution said to simplify the user’s ability to leverage chip-level resources to the printed circuit board or system levels.
LOWELL, MA -- Mentor Graphics will acquire SofTech's CADRA line of mechanical design and drafting software for up to $4 million, depending on future sales. Mentor will initially pay $3.2 million for the product line, plus earn-out payments of up to $750,000 based on 10% of CADRA revenue generated by Mentor in the three-year period following the closing.