Printed Circuit Design & Fab Online Magazine - Design News

Design News

Details: Written by Staff; Category: Design News; Published: 12 November 2008

MARLBOROUGH, MA– DownStream Technologies, LLC introduces BluePrint-4-PADS. This latest configuration of BluePrint-PCB is targeted to Mentor PADS Layout users. Users are able to simplify and automate the creation of documentation driving PCB fabrication, assembly and inspection processes.

Features include drag and drop, as well as automatic formatting of PCB views. The configuration uses the PADS ASCII file for intelligent PCB view display. It contains built-in word processing and spell check. It can hyperlink between notes, callouts and details, and it is node-locked.

There is support for drill tolerances, as well as unlimited PCB views on a single sheet. It has a free BluePrint document viewer download, and it has an automatic layer stack up detail creation.

Details: Written by Staff; Category: Design News; Published: 11 November 2008

SANTA CLARA, CA– Agilent Technologies Inc. has released a series of all-in-one solution kits designed to assist engineering and electronics teachers. Each kit contains undergraduate engineering coursework, teaching slide sets, problem-based student labs and measurement equipment meeting industry standards.
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Details: Written by Staff; Category: Design News; Published: 11 November 2008

PARIS– AWR Corporation will receive the Electron d’Or Award for its AXIEM 3D planar electromagnetic (EM) software. Sponsored by Electronique Magazine, the award is recognizes products in 12 categories.

AWR received its award in the CAE category. An independent jury of experts in the electronics industry chooses recipients. To be considered, products must have been released within the previous 12 months.

Details: Written by Staff; Category: Design News; Published: 11 November 2008

MUNICH, GERMANY -- Rochester Electronics has launched a source directory web site of authorized distributors to help customers buy fully-traceable and manufacturer-certified parts.

The site, www.ElectronicsASD.com, is endorsed by the Semiconductor Industry Association's Anti-Counterfeit Task Force. It is designed to help combat the growing problem of counterfeit components entering the supply chain. The Electronics Authorized Source Directory (EASD) is part of a larger campaign by SIA that involves working with customs authorities to seize counterfeits at the borders and encouraging the authentication of legitimate products and distributors.

For a copy of the printed reference manual, e-mail your request to This email address is being protected from spambots. You need JavaScript enabled to view it.. The site, www.electronicasd.com, links from www.sia-online.org, www.rocelec.com and other participating manufacturers.

HAUPPAUGE, NY - Jaco Electronics announced today an agreement in principle to sell to certain assets of its components distribution business to WPG Americas Inc., a subsidiary of World Peace Industrial Group. The transaction is subject to customary closing conditions and is expected to close within the next 30 days.

During a transition period, Jaco will provide support to its vendors and customers and to WPG with respect to logistics and enterprise resource and planning.

Jaco will now focus on flat panel displays and valued-added services.

Jaco chairman, president and CEO Joel Girsky said, “The electronic components business has been transitioning to Asia. As a result, we have decided to shift our strategy and focus on Jaco’s core competency -- displays and embedded computing. In WPG we have found a suitor that is committed to growing our North American component business."

SANTA CLARA, CA– Agilent Technologies Inc. introduces Jivaro-for-GoldenGate, designed in partnership with edXact. The parasitic model order-reduction tool is designed for use with the GoldenGate RF simulator software. It is reported to enhance RFIC simulation speed and capacity– with negligible accuracy loss.

“Jivaro-for-GoldenGate fills the void between circuit extraction and simulation that results from an increase in parasitic components required to model the physical reality of circuit interconnects, substrates or packages,” explains Mathias Silvant, edXact president. Combined with GoldenGate RF, Jivaro reduces memory requirements and increases simulation speed during large parasitic-dominated, post-layout netlists.