Studio Suite simulation software has undergone a major redesign. A project wizard helps setup the software to meet a particular application type’s requirements and provide relevant results. This configuration can be modified by the user based on the experience gathered on-site to deal with the specific application characteristics. The modified configuration can be stored and reused easily. The user interface now not only groups features and menus, it also guides the engineer through the simulation process, only showing the currently active or relevant options. CST Microwave transient solver benefits from a quicker matrix set-up, the solver runs faster employing the latest Intel technology, and is able to deal with larger problems.

Highlights include:
o Ribbon based user interface
o Project wizard
o Automatic storage of parametric results
o Cylinder scan for farfields of all solvers

CST MWS transient solver
o Faster, more memory efficient mesh generation
o Kernel optimized for latest processor generation
o Non-linear, frequency dependent materials, for example Kerr and Raman materials
o More than 2 billion mesh cells
o GPU acceleration for TLM solver

CST MWS frequency domain solvers
o Curved tetrahedrons now default
o Improved mesh set-up
o Improved performance and memory efficiency
o Efficient Eigenmode-solver for lossy dielectrics

CST MWS asymptotic solver
o Range profiles for RCS

CST Design Studio
o Improved automation for model set-up and result creation

CST Particle Studio

o GPU support for particle-in-cell simulation

Scheduled for release end first quarter 2013.

CST, www.cst.com

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HyperLynx DRC performs design rule checking on printed circuit board layout databases. Driven by customizable rules, it can be executed during the PCB layout process to highlight potential high-speed design issues pertaining to signal integrity, power integrity, and electromagnetic interference. Comes with a standard set of coded rules targeted at PCB layout practices that have the potential to cause issues common in high-speed design. Standard rules are parametrically driven so users can customize them. Samples of such issues include traces crossing plane splits, reference plane changes, nets near board edges, coupling to I/O nets, long interconnects, termination checks, impedance variations, crosstalk coupling, power net width, and decoupling cap proximity. Permits rule creation using VBScript and/or Javascript. Is interfaced with all major PCB layout tools, including Mentor’s Expedition Enterprise, Board Station and PADSR, Cadence Allegro, and Zuken CR.

Mentor Graphics, www.mentor.com

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