Printed Circuit Design & Fab Online Magazine - New Products

New Products

A8a test system comes with eight test heads and four cameras for optical alignment. Tests pad sizes down to 35 microns. Test area is 18" x 12". Eliminates limitations of test point density or fine-pitch contacts. Features embedded component test or a 4-wire Kelvin measurement with an accuracy of +/-0.025 mΩ. Comes with separate good and bad board stacker. Bad boards can be optionally labeled by a 2D code indicating reference between the boards and corresponding fault file. Feeder capacity of 390mm. Dual shuttle system reduces product exchange time to less than 4 sec. in automation mode.

atg Luther & Maelzer, www.atg-lm.com

Via Dep 4550 electroless copper reportedly provides blister-free electroless copper deposits on polyimide, flexible printed circuit boards, Kapton, Teflon, plated-over-filled vias, and high Tg epoxy laminates. Has nearly zero internal stress and excellent adhesion. Passes thermal cycling test (IPC-TM-650, 2.6.26A) and thermal stress (IPC-TM-650, 2.6.8E) requirements. Is designed as a drop-in replacement process for vertical and horizontal applications. The chelation system is tartrate-based and has no cyanide or heavy metals.

OM Group, www.omgi.com/

VTOS DDR software verifies new board designs, product introductions, and full volume manufacturing test. Built on VTOS embedded software for hardware verification. Is said to accelerate the process of configuring new DDR, DDR2, LPDDR, and DDR3 memories, while providing proven built-in verification algorithms. Uses minimal system-on-chip (SoC) resources to provide a stable on-device application for configuring, tuning and verifying DDR memories without embedded device restarts. Require no compilation of embedded software in order to work with VTOS DDR. Configuration, margining, and testing of DDR is performed at run time without compilation and system restarts.

Kozio, http://www.kozio.com ),

PCB Designer 7.2.3 CAD tool fixes an error that occurs at the time of printing NC drill tables. Software performs panelization, transmission line analysis, mesh plane creation, design rules checks, test pin hole auto-generation, and sets keepout areas and height restrictions, and more. Outputs in Gerber and ODB++.

Quadcept, https://www.quadcept.com/en/product/pcb.html

Library Expert's output to Altium Designer has a new “Script” interface; can import footprints and 3D Step into an existing library or a new library with one part at a time or 10,000 parts in minutes. Automatically applies user-defined user preferences for pad shapes for each component family, working units, drafting outlines, footprint Pin 1 zero orientation, construction rules, solder joint goals and layer assignments. Has a footprint designer; can create footprints using manufacturer recommended pattern data. Pads ASCII still an option, but no longer required. Outputs to formats readable by Allegro, OrCAD PCB, OrCAD Layout, CADint, DesignSpark, Expedition, Pads Layout, Cadstar, CR-5000, Pantheon, Pulsonix, P-CAD, Ultiboard, Target 3001!, Eagle, DipTrace, Board Station, SoloPCB, and Proteus. Outputs 3D Step models readable by an increasing number of CAD tools.

PCB Libraries, www.pcblibraries.com

Gryphon 3D printer uses inkjet technology for enhanced solder mask deposition on printed circuit boards. Uses direct deposition to apply mask only where it is needed, for better solder mask depth and alignment. Footprint is smaller than direct imaging equipment.

Camtek, http://www.camtek.co.il/