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Design News

Details: Written by Staff; Category: Design News; Published: 22 May 2008

WILSONVILLE, OR â€• Mentor Graphics Corp. announced first quarter fiscal 2009 revenue of $179.2 million.

“In a difficult environment, the company performed as we forecast,” said Walden C. Rhines, company CEO.

“During the quarter, we extended our cost management efforts,” said Gregory K. Hinckley, company president. “Looking forward, we continue to see a strong second half driven by renewals.”

The company has reported that for fiscal year 2009, the company expects revenue of approximately $915 million. For the fiscal second quarter, the company expects revenue of about $173 million.

Details: Written by Staff; Category: Design News; Published: 21 May 2008

DANBURY, CT - Electro Energy Inc. (EEEI) has announced that it has been awarded a contract from the U.S. Army to continue development of thermal batteries used in military applications.

The U.S. Army has awarded Electro Energy a DoD Small Business Innovation Research (SBIR) phase two contract for low-cost thermal batteries. EEEI is developing process manufacturing techniques for the production of thermal battery electrodes and separators. These cell components are flexible and can be used to fabricate batteries that have three-dimensional shapes.

Successful commercialization of EEEI's thermal battery fabrication technology would lead to increased design options in military applications as well as commercial markets. The two-year contract value is $729,991.55 and will be incrementally funded for FY08 and FY09.

RICHARDSON, TX – ASSET InterTech has joined the Mentor Graphics OpenDoor Program to ensure tool set interoperability for embedded instrumentation. Through the program, ASSET and Mentor will collaborate on data exchange between Mentor’s chip-level DFT structures and ASSET’s ScanWorks platform.

"We are very pleased and excited that ASSET has joined our OpenDoor Program," said Greg Aldrich, marketing director at Mentor Graphics. "As the leading DFT tools supplier it is important to validate and ensure interoperability with downstream applications that our customers are using."

Initially, interoperability testing will be conducted for both the original boundary scan standard, IEEE 1149.1, as well as the newer IEEE 1149.6 standard that specifies a test methodology for high-speed, differential interconnects.

"Users of EDA tools like those from Mentor are interested in boundary scan and JTAG verification because many of the chips they are designing will include core embedded instrumentation. These embedded instruments will be accessed by JTAG, so full compliance with all boundary scan standards is needed to automate, access and analyze them," explained Alan Sguigna, ASSET’s VP of sales and marketing.