Xpedition Path Finder software suite is for designing printed circuit board assembling and optimizing complex electronics systems, enabling improved design and increased chip performance.  IC layout design data can be represented as a virtual die model, containing IC-level detail specific to co-design and optimization. Board design data can be modeled as individual interfaces or as complete designs. Packages can be built based on pin array and manipulation capabilities, existing devices, and industry-standard formats. Addresses design complexity of system-on-chip and multi-die packaging. Can capture and manage connectivity based on preference. Cross-domain pin mapping and net combining can be managed in all modes of connectivity capture. Can perform rules-based pin/ball-out studies from respective domains, by signal, bus or interface. Automates library development process. Features a correct-by-construction layout environment. Core Xpedition layout tool provides BGA breakout and escape algorithms, coupled with support for microvia structures; shape-based, any-angle routing; plane areas that fill around traces and vias during editing, and RF circuit design and optimization. Rule-based ball-out assignment includes optimization engine/editor for planning by bank, byte, reference voltage, clock domain, etc. Has a single tool for multi-mode physical design (PCB, MCM, SiP, RF, Hybrid and BGA designs). Virtual Die Model captures IC layout design intent and integration with 2D and 3D electro-magnetic and computational fluid dynamics thermal analysis engines.

Mentor Graphics, http://www.mentor.com/

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