The reality of a brittle supply chain could mean harsh consequences for failure to deliver.
A field programmable gate array (FPGA) is an integrated circuit configurable by customers in the field, making such devices desirable for space and defense applications. A fortified version, known as a Radiation Hardened (RadHard) FPGA, can withstand attacks from electromagnetic and particle radiation in outer space.
Columns, rather than solder balls, are a critical subcomponent in the final assembly of FPGA packages. A sudden shortage of mission-critical FPGA devices could result in warfighters not flying and rockets not launching. This is not an exaggeration. But how could this be? Quite simply, makers of ruggedized FPGA devices depend on a single subcontractor to provide services to attach copper-wrapped solder columns.
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A look at the geometry associated with plated through-holes in a PCB.
Application notes describe how to save layers in a PCB by routing two traces between pins on a 1mm pitch BGA. A leading FPGA vendor recommends this practice to use its very-high-pin-count FPGAs in a low-layer-count PCB. When this approach is used for a high-layer-count PCB, the result is often, if not always, very poor yields, and the board is unreliable when used in a system under actual conditions, as opposed to in a laboratory or a prototype built in a small volume by a specialty shop. The following discussion will illustrate why this approach results in unsatisfactory yields when volume manufacture is attempted.
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Written by Joanne Friedman, Ph.D., and Barbara Goldstein
Category: Features
What the electronics industry must do to change that.
Ed.: This is the seventh of an occasional series by the authors of the 2019 iNEMI Roadmap. This information is excerpted from the roadmap, available from iNEMI (inemi.org/2019-roadmap-overview).
To realize the benefits and potential of the Industrial Internet of Things (IIoT) or move toward Industry 4.0, the industry must overcome several challenges ranging from securing the factory equipment used to produce secure IoT-ready products to defining the cobotic dialogue so collaboration between humans and machines can be used to drive innovation, while providing efficiencies with minimal workforce displacement in this industry and those of its customers.
Aside from technical issues, ethical, geopolitical, economic and regulatory issues may affect the current and future state of the industry.
Hackers have already wreaked havoc by infiltrating connected IoT devices. Paradoxically, they usually aren’t targeting device owners, who often remain unaware of security breaches. Instead, the hackers may simply use IoT devices as starting points for attacks directed against another target. For instance, the 2016 Mirai attack, which used IoT devices to launch a distributed denial of services against gaming servers, ended up attacking the Internet infrastructure, causing shutdowns across Europe and North America that resulted in significant economic damage. As the IoT base continues to show double-digit growth rates, security is simultaneously a major industry challenge and a significant opportunity.
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Speculation abounds over what a designer should do when making the stackup and design rules for a four-layer PCB. Much of this speculation or rules-of-thumb came about when those not familiar with the reasons for arranging the layers in a four-layer PCB tried to explain what they saw or heard. This article explains how four-layer PCBs came into existence and guides readers on how to create a set of design rules and stackup that results in a solid, functional design with minimum constraints.
Early logic designs were done with two layers. Power was distributed using traces to connect all the power and ground pins to the power supply rails. Logic devices were packaged in 14- and 16-lead dual inline packages (DIPs). FIGURE 1 is an example of such a two-layer logic design. Logic speeds were slow enough that connecting power with traces instead of planes was “good enough.” Figure 1 is a design the author did using Bishop Graphics tape to create the artwork in the early 1970s.
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A common assumption is differential signals are “equal and opposite.” Is it true?
Periodically, questions about differential trace design rules come up. There is always confusion over whether it is necessary to route differential traces close together, whether a plane needs to be underneath differential traces, or whether to consider differential impedance design rules with differential traces. In one sense, the answers to these questions are difficult, but in another sense they are simple. In fact, if we are not concerned about signal integrity issues, there are no design rules at all. Here is my way of trying to clarify things.
First, what are differential signals, and why are they different? FIGURE 1 illustrates a single (sometimes referred to as a single-ended) trace connecting a driver and a receiver (a) and a differential trace pair (b). Let’s say the signal amplitude (with respect to the reference voltage) in Figure 1a is V = +1. In Figure 1b, there are two signals, V+ = +1 and V- = -1. What the receiver in Figure 2 sees is the difference between these two signals, V+ - V- = +1 – (-1) = +2. The first, and most obvious, difference between the two configurations is that differential signals offer twice the signal level to the receiver. Usually, this translates into twice the signal-to-noise (S/N) level. This is a clear advantage over the single-ended case, and is the primary advantage of differential signals, especially when signal levels are low (as with many sensors).
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A car’s Monocoque (a French term) refers to a type of vehicle construction in which the body is integral with the chassis; basically a “skin” that supports its load by distributing tension and compression across its surface.
Monocoque structure is a technical term used in designing cars and boats. Most cars no longer use frames for structural support and crash-protection.
Similar ideas have been introduced for wiring in electronic devices. More than half of flexible circuits are now designed with 3-D wiring for tight spaces in small electronic devices. Rigid printed circuits and wire harnesses were not adequate, so flexible circuits are options for 3-D wiring in smartphones and tablet PCs. The relatively high cost of flexible circuits is an issue for device manufacturers; they are considering alternatives for building electronic circuits on plastic housing with or without framing. Once a new 3-D wiring technology is available, they can significantly reduce wiring space and assembling costs.
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