About 20 years ago, when I first learned to use a computer to design boards, several of us started dreaming up a generation of design tools that would allow us to sit in front of a monitor wearing a headset to “think” our place-and-route techniques. It wasn’t enough to get off the light table and on to these new Telesis machines; we’d talk about taking things a step further. This Star Trek-style technology would eliminate keyboards and light pens that got in the way and slowed our work. Remember, these were the days of DEC PDP11-based machines with a 20Mb hard drive the size of a show box.
Skip ahead in time to 2010. Most of us are familiar with the technology of networking multiple computers to gain a jump in processing power. In fact, most of today’s PCs use multiple cores. Sometime next year, Intel is expected to release a line of Core-branded chips with six- and eight-core processors. But it’s what Intel is working on next that has the potential to really shake things up.
Last month, researchers from Intel Labs demonstrated an experimental 48-core processor. That’s right, 48 cores on a chip about the size of a postage stamp. That’s 10 to 20 times the number of processing engines in the current off-the-shelf computers.
Some of you are thinking it’s going to take a small nuclear reactor to power the thing, but according to Intel, newly developed power management techniques permit the cores to operate very energy efficiently – at as little as 25W, or 125W at maximum performance. According to a company announcement, Intel plans to provide at least 100 of the devices to industry and academia to help spur software and programming models.
With that kind of processing power, all sorts of new applications could become reality. It would probably permit computer manufacturers to eliminate board memory and even some of the hardware we take for granted, such as the keyboard and mouse. Some have speculated that computers with this level of power could even read brain waves. Hey, did someone say design by telepathy? George Jetson would be proud.
This leads me to a conversation I had with some friends just recently. These four friends work for one of the large communications companies and have been involved in PCB design at one time or another. Two have moved into management but are still associated with the design group. After we caught up on what had been going on in each other’s lives, we moved on to our profession. While kicking around several thoughts, one friend raised the core question many designers think about at one time or another: “What is the future of PCB designers?”
Many OEMs are outsourcing more of the physical place-and-route design work. In many cases, the work goes offshore to developing countries anxious to add design to their manufacturing expertise. One of my friends suggested that today’s OEM designer eventually would become more of a product manager. Many companies currently work on designs around the clock using design teams physically spread around the globe. Someone has to manage the process, and I suppose the idea of having an in-house designer do so makes sense. In North America, we continue to see an aging of the design force. Fewer young people are coming up through the design ranks and fewer engineers are joining this industry. It doesn’t take a crystal ball to see that at some point there just won’t be people to fill the positions, even if the jobs remain in-house.
I hope this is not the future of PCB design in the US. I’d much prefer to see the generation that grew up with ever-evolving video games as something they take for granted transition to a video game called PCB Designer. Maybe tools that put the whole design and verification processes into a virtual realm would motivate some of the gamer generation to rethink PCB design as a career. When they grow up, they can become product managers.
Me, I’m excited about that laptop with a 48-core processor. It will probably glow in the dark like a nightlight.
Pete Waddell is the design technical editor of PCD&F (pcdandf.com); pwaddell@upmediagroup.com.
In the so-called Democratic Republic of Congo, the war between various government and rebel armies has raged for 10 years, fueled by monies derived from the country’s vast mines. In the West, the war over the output of those mines is heating up.
In December, a group of OEMs called the Electronic Industry Citizenship Coalition met with the International Tin Research Institute and a representative from the IPC Solder Products Value Council in Paris to discuss elimination of so-called conflict metals by the electronics industry. Among the topics discussed was an audit program for the supply chain, the cost of which would be shared by OEMs and solder manufacturers, among others.
Solder manufacturers purchase thousands of tons of raw materials from Congo mines. Because the revenues are used to arm renegades, some in the press have taken to calling the ores “conflict metals.” Although press attention to the matter has been nominal at best, more than five million people have died, making this one of history’s worst tragedies.
Mined ores are brought to large refineries, some in the Congo, some outside, where they are melted together. From there, the shipments are sold by distributors of the refineries, primarily via contracts on the London Metals Exchange. The material received by the solder manufacturers bears no thumbprint, no genetic markings.
Any company that purchases directly from exchanges – which is more or less all of them – stands to be affected by this nonsense. The major bar solder companies, including Cookson, Kester and AIM, could really be in for a treat. As they get a significant amount of their material from reclaimed metal, tracing the “ores” would be like trying to deduce the origin of oxygen. As a spokesman for one of the major solder suppliers told me, “It is possible for us to ask for certificates, but we would have no way to validate.” Since the refineries are closest to the mines, they should be the ones asked to audit their supply chain, he added.
But while tin has no DNA, BS certainly does, and some media outposts are shoveling it by the truckload.
In the US, legislators are working up a bill (the Conflict Minerals Trade Act of 2009) requiring companies to disclose – and prove – the origins of the minerals they buy. The Huffington Post, an influential blog cum news and opinion site visited by some 8.5 million visitors a month, has taken up the cause, recently asserting that a process is available for tracing solder materials back to the mines. (The link is here.)
Audits, be it driven by legislation or third parties, are a misguided and untenable response. As the solder spokesman noted, “Electronics companies would never buy directly from the mines; thus, good auditing at the refineries would do the trick without pushing it upstream to companies that are a minimum of three tiers away from the conflict zone.”
As WEEE and RoHS has aptly demonstrated, the electronics industry has had it up to here with its trade groups taking expensive but politically expedient ways out. In the end, such movements have emptied manufacturers’ pockets at no benefit to the end-customer. It’s refreshing to see IPC, through its solder supplier members, fighting back this time.
The next meeting is planned for Vancouver in May. (If nothing else, one has to appreciate the places they choose to convene.) Make it your New Year’s resolution to pressure the EICC (which includes, among others, that noted worker-friendly enterprise Foxconn) and ITRI (not to mention any legislator caught advocating for such regulation) to back off on what would certainly be another hefty tax with no demonstrable return.
Selling low. A friend of mine who works in finance at a Wall Street company says an acquisition opportunity for a leading process equipment OEM came across his desk a few months back. While the improvement in the economy may spur the parent company to take this business unit off the block, what’s more likely is that the continued commoditization of electronics manufacturing will lead many investors to look elsewhere, where the potential of larger returns is greater. If a market-leading OEM with long history of profitability isn’t an attractive piece of one’s portfolio, what does that portend for those companies more prone to the industry’s rollercoaster ways? And especially now, why doesn’t Wall Street find well-run and stable conglomerates like Nordson and Dover, for instance, more appealing?
One magazine? As many readers noted, last month we co-published PCD&F and Circuits Assembly. This is not intended to be a permanent arrangement, but rather a nod to the current economic world in which we live. Either way, we’re glad you’re reading.
Speaking of last month, I wrote in this space that the TTM-Meadville deal would make high-ranking Hong Kong government official Henry Tang a 33% owner of TTM. In fact, Tang’s father would be the top shareholder.
Finally, we welcome our newest columnist, Andy Murrietta. Andy, who is a second-generation PCB veteran with experience in design, fabrication and assembly (and management), will contribute to our Better Manufacturing column.
Mike Buetow is Editor-in-Chief of UP Media Group; mbuetow@upmediagroup.com.
We saw the sun in Munich.
For the first time in 10 years, I saw the distinct yellow rays of that giant orb in the sky break through the ubiquitous gray of the November German sky. Was it a sign? An omen? Global warming?
No, it was just good timing. But for once, scheduling the world’s largest electronics manufacturing trade show in a cold climate and on the cusp of the holiday season turned out to be a wise move.
Amid tepid expectations, Productronica turned out stronger than expected, with attendance lower than past years, but solid nonetheless. And while it clearly has become a regional (read: European) event, and several big-name suppliers opted out, and the fab side is a shell of its former self, Productronica defied gravity and the pundits to remain the mother of all trade shows.
In general, almost all the 80-plus companies we spoke to during the Nov. 10-13 show felt the corner has been turned. The capital equipment companies generally felt the bottom was last January, and reported September and October were to that point the strongest months of the year.
Across the board, the sentiment is that this year will be financially better, though there is disagreement on just how much so. Few companies reported equipment buys for capacity outside China. Perhaps more important, after a year of malaise, there is a noticeable improvement in the general outlook for 2010. The optimists far outnumbered the pessimists.
What follows are comments beyond what could be found in the company press releases leading up to the show. To review the product releases – and there were many – please visit our special web sections at circuitsassembly.com/productronica2009 and pcdandf.com/productronica2009.
Time was, Productronica was equal parts assembly and fabrication. No more. While assembly commands four-plus halls, the fab side has been reduced to a single hall. Laminate makers Isola, Arlon, Kingboard, Ventec and others were on hand, many in booths more in tune with the current market conditions and expectations for the show. Precious few machines were shown. Gone are the days when visitors could see 40 to 60 ft. plating lines in action.
David Rund, president of Taiyo America, called the show “excellent,” adding that with 80% market share in the US, Europe was the next big market for the soldermask supplier to target. He added that many attendees appeared concerned about the supply chain, and were attempting to assess their supplier’s financial viability before ordering product.
We did see a few sales made. Teknek sold a CM8 clean machine to Graphic. David Westwood will become GM of Teknek US and, with marketing manager (and wife) Jenni Westwood, will be moving to Charlotte, NC, to launch the company’s operations.
LPKF was drawing a crowd to gawk at the sharp BMW motorcycle on display, a vehicle (get it?) to highlight LPKF’s micromachining and LDS laser process that the automaker uses in a number of its products, mostly for steering control boards.
Holmüller is quickly coalescing with parent company Rena. It was a little odd not seeing Joe Kresky there, however.
Kodak rolled out its latest version of Accumax red-sensitive film to Europe. The company agreed that not many visitors were from outside Europe.
Staff I spoke with at Ventec, Isola and others remarked the show was smaller than in the past. Rogers added that the show was “smaller than usual, but not too bad,” estimating perhaps 20% of the attendees were from outside Europe. Interestingly, the attendees were almost all PCB manufacturers, not the OEM designers the company typically targets. John Hendricks says it could be because the visitors want to see the company’s tech support staff, and because they are now offering more high temperature products that would appeal to fabricators. The company is ending its polyimide lines because, as Hendricks said, that is “a dogfight we don’t want to be in.”
Meanwhile, Arlon was showing EP-2, its enhanced polyimide for high-speed digital applications, which features a Tg of 250°C, lower moisture absorption and lower electrical loss.
Productronica today is primarily an assembly show. The large placement companies continue to one-up each other with booths that, although toned down from previous years, still dazzled.
ASYS’s Markus Wilkens was among the many who observed the lack of attendees from Asia, although he saw several buyers from Brazil and a few from US and Mexico. The company showed the upgraded ADS automated depaneling system. It also increased the speed on its X3 printer.
Henkel Electronics global marketing manager Doug Dixon noted plenty of industry blowback to proposed legislation over so-called conflict metals (tin and other ores mined in the Congo). The industry, under the auspices of the IPC Solder Products Value Council, is readying a response. Henkel was showing a series of new die attach and Pb-free pastes.
Balver-Zinn launched the Aquasol water-soluble flux paste. Aimed at US market, it is in beta and is said to handle all alloys. Also new: a VOC flux (3960RX). The company also is working on a new no-clean paste, which will come in SnPb and Pb-free versions for pin-in-paste applications. Conductive adhesives remain on the company’s roadmap, but next up are low-VOC fluxes for Asia.
Asymtek typically has several new offerings and this year did not disappoint. The firm has upgraded the Spectrum S-920, an inline dual-jetting dispenser aimed at cellphone boards; the SC400, for jetting conformal coating; and the DispenseMate, a batch-style tabletop dispenser for UV-curable materials. Vice president of sales Greg Wood noted business is improving and the company “can see the ice starting to melt.” Meanwhile, Asymtek parent Nordson has hit $1 billion in overall sales and now is pushing its corporate identity on top of all the brands, a move that is being met with mixed reviews among the show attendees we spoke with.
Juki’s Heinz Schlup showed the KE-3020RL flexible mounter now in beta and due out this year. The dual head machine uses 25% less power than previous models and is rated at 17,100 cph per IPC-9850. “While the placement equipment market fell by 80% in 2009, it looks like the worst is behind us,” said Jurg Schuepbach, president of Juki Europe. However, he cautioned, large companies are not yet investing, and most won’t do so for another 12 months.
Fuji’s Scott Wischhoffer proudly displayed the NXTII placement machine, which comes with dual placement heads, one of which can be replaced with an inspection head. That head holds a single camera with three light systems, and is for higher reliability product, like pacemakers, where traceability is desired. The company will have two new machines at Apex.
Assembléon announced the integration of its pick-and-place machine interfaces into Valor’s software products. The enhanced machine interfaces now are available for Valor’s process engineering tool vPlan on Assembléon’s A-, M- and X-Series machines. The firms expect to expand the relationship to Valor’s MES tools. The company also said its rep deal with Yamaha remains intact.
Separately, Valor also exhibited DynaMix, its fully integrated MES software. The company reiterated that it will maintain its distribution and rep channel after the company’s acquisition by Mentor goes through.
Siemens’ CEO Guenter Lauber noted that business picked up in the June and July timeframe, primarily in China. Most sales are for replacement machines, although some orders have been for increased capacity, he said.
Europlacer displayed its xpii placement machine. The single- or dual-head machine features linear motors, front and rear feeders, and trolley-style or fixed bases. It can handle up to 92 feeders and places part sizes of 01005 to 50 x 50 mm.
Rehm said vapor phase machines have been outselling the general reflow market. With automotive still lead-heavy, the company feels there is plenty of room to grow. COO Marc Dalderup cited a slow improvement in business, adding 2010 could be up 10-30% from 2009.
Seho showed the PowerSelective selective soldering machine, with dual pots to facilitate changeover time. Christian Ott said the company is “completely loaded” through year-end and called the business outlook good.
KIC is pushing solutions to reduce energy use in ovens. The company has a new shield for real-time profiling of inline vapor phase machines.
Mirtec is adding laser systems to its AOI line to enhance coplanarity and improve paste measurement capability. The company reported 100% growth in 2009.
Koh Young is growing. It has added two engineers in Ireland and now claims a 35% market share in SPI worldwide. It sold its first Aspire 3-D AOI to a consumer electronics OEM in Europe, and reported a second sale was about to close with a US customer.
A somewhat new face in the field was Opro Vision, which took over Orbotech’s assembly inspection business in 2009. With the machines, it brought on several ex Orbotech staffers, including Arnon Tuval as president. It now has 19 staff, half in development, half in support. Production takes place in Italy, some by third parties. Since the buyout, Opro Vision has developed a new tabletop AOI.
Viscom was among those noting a “big” increase in sales in October. Visitors were most interested in the company’s X7056 combination AOI/AXI.
TechCon Systems’ global sales and marketing manager Brian Glass held modest expectations for the show, but said the traffic and quality of leads matched those of two years ago.
Electrolube introduced some 13 products, most of which were non-VOC flavors of conformal coatings. Customer demand is driving its push into that technology, marketing manager Karen Harrison said.
Humiseal now offers gel versions of all its coatings. It has opened a manufacturing 100,000 sq. ft., fully automated facility in Pittsburgh, PA, and noted business has been picking up since May.
Overheard
We encountered several familiar faces on the show floor. One was Keith Favre, the former Electrovert, Speedline and PhotoStencil executive, who has launched his own rep business, FHP LLC (fhpreps.com).
Ovation Products founder (and Grid-Lok inventor) Charlie Moncavage supposedly is working on a new, cheaper board support system.
R&D Technical Services sold a third vapor phase rework machine to IBM.
Mike Buetow is editor-in-chief of CIRCUITS ASSEMBLY (circuitsassembly.com); mbuetow@upmediagroup.com.
Proper design of high-speed, analog PCBs can make and break system electrical performance. Complex physical and electrical designs, densely packed boards and faster signal requirements are examples of factors that add complexity to today’s PCB designs. Consequently, designers should be able to easily define, manage, evaluate and validate physical and spacing constraints that apply to critical, high-speed signals. This should be done during the early stages of the design process. At the same time, the designer must ensure that the final layout design meets performance, manufacturing and test specification goals.
A density-predicting calculator is a tool that performs a tradeoff analysis at the feasibility stage, given the constraints of the assigned area. It takes into account the available CAD data analyses, including the electrical schematics, during the early stages of PCB design and layout. These initial data include the number of components, and the type and characteristics of the components once selected. The number of connections is also available, based on the interconnections and busses.
To make effective use of a density-predicting tool, several parameters should be made known prior to the feasibility analysis run:
For high-speed, high-frequency design, analyze the trace’s controlled impedance because the trace is now considered a transmission line.
The board technology and the stackup structure; for example, the PCB thickness and the number of signal and non-signal layers. Also, HDI technology, if used, needed to complete the PCB layout routing.
Calculator algorithm. A board’s density can be measured by several methods. One method is based on the number of connections per square inch, with any amount between 65 and 120 connections considered dense. Other methods include the number of components per square inch or the pad count per square inch.
For example, consider two board layouts (Figure 1) for the same product, designed in 1990 and 2000, respectively. The board designed in 2000 has more functions compared with the one from 1990, and it is denser in terms of the number of layers, line/space density and assembly density (Table 1).
For the same product, the newer board is denser, while using a smaller area and fewer layers. The user can define a maximal density factor for a number of PCBs in a given product, and boards would have the same or lower density factor. Obviously, this definition can change as the technology progresses and new design rules are implemented.
To gain confidence in the feasibility of the board design, we define the following terms used as inputs:
Given these two values, we can run the program to get the density result defined as the ratio of demand to capacity.
For the demand part of the equation, we enter all known CAD design data (Figure 2). Usually these data are available once the design is completed. Mechanical design established the board size and its outline structure. After importing the mechanical data into the CAD design workdesk, the available area will be expressed either in terms of square inches or square millimeters.
Design technology is a key parameter in the prediction calculator. Many high-speed designs have electrical signal constraints such as controlled impedance signals, differential signals, fast clocks and tuning requirements. The electrical designer knows most of these data. The program calculates the wiring demand, as shown in the bottom of the dialogue box. The higher the number, the more complex the board. As a rule of thumb, if the wiring demand number exceeds the value of 80, one should consider using HDI.
In the capacity dialogue box (Figure 3), we enter initial concepts such as BGA pitch, typical trace width, typical via hole, number of signal layers expected and type of design. There is always a limit on the amount of routing each board can accommodate. The main contributors include:
As a result of the calculation, the wiring capacity appears at the bottom of the dialogue box. Again, the higher the number, the more complex the board.
‘What-if’ analysis. If the capacity value is higher than the demand value, the chosen design rules and technology are sufficient, and cost reduction may be an option. If the capacity value is equal to the demand value, the chosen design rules and technology are sufficient; however, either some effort may be required to finish the layout, a compromise on the constraints will be required during the design, or future changes will be difficult to implement. Finally, if the demand value is higher than the capacity value, the chosen design rules and technology are insufficient, and a set of checkups should take place. These can include the available layout area, the technology used for PCB manufacturing and the layer count. Figures 4 and 5 show comparisons between demand and capacity data.
Since electronic designs are now done with CAD tools, smooth integration is available between the schematic and the layout. All the schematic symbols, pins, connections and constraints are imported to the PCB layout tool in the netlist.
The netlist file brings the schematic and the PCB database together. The embedded data include all available design resources that fit into the definition of capacity of the specific PCB layout. Second, all requirements for that specific design are known as the demand. The demand data include:
The capacity data include:
Conclusion
Organizations that have a PCB database information center can standardize their boards to a relative board density factor and keep track of board manufacturability and performance by comparing the density factor data to achieve better electrical performance and PCB cost reduction. PCD&F
Acknowledgement
This work was funded by Elbit System; Israel.
Ed.: This article is adapted from a presentation at IPC Apex 2009 and is reprinted with the authors’ permission.
Ruth Kastner is owner and engineering manager at Adcom Ltd. (adcom.co.il); ruthk@adcom.co.il. Eliahu Moshe is electronic design R&D Manager at Adcom.
The Face-to-Face sessions of PCB West’s pasts are but a memory, but that doesn’t mean the industry’s EDA suppliers should consider themselves free and clear.
This is the first in a series of features on EDA tools that we plan to publish in 2010. This first survey was intended to concentrate on general design and layout tools. But intent and reality sometimes conflict. Interestingly, several respondents felt FPGAs will have a growing impact on PCB design, so some of their answers deal with things outside pure board layout.
In the coming months we’ll concentrate on design entry tools, simulation tools and backend design verification/manufacturability tools. If there is a case to be made for other categories of tools, we’ll include them also.
For this article, we spoke with John Isaac of Mentor Graphics, Hemant Shah of Cadence, Abby Monaco of Intercept Technology, Manny Marcano of EMA Design Automation, Dr. Marty Hauff at Altium, and Bhavesh Mistry at National Instruments. Due to the number and length of the answers, we’ve truncated this report. For a full version, visit pcdandf.com. Note: To comment on this feature, visit our Laying It Out blog at pcdandf.blogspot.com.
What is the most impressive tool in your current toolbox?
Mentor: Mentor has unique technology for enabling true concurrent design and design team collaboration. Typical concurrent design in other systems is enabled by a split-and-join process, where a database is divided among the engineers or designers, edited, and then put back together via a manual and error-prone process. Our approach provides true concurrency for schematic entry, constraint entry, layout and manufacturing data generation, where designers are editing a common database at the same time over a LAN or WAN, and are able to see their peers’ edits in real-time.
Intercept: Intercept’s Pantheon layout design application is a leader in PCB, RF, hybrid, high speed, SiP, analog, digital, and mixed-signal designs within a single application. Pantheon’s advanced system generates and verifies artwork and manufacturing rules, and enables flexible shape and fill manipulation, design reuse with block technology, automatic creation and management of high-speed constraints and signal paths, and layout-driven design capabilities. As part of a complete environment solution, Pantheon offers full integration with Mozaix schematic, Indx library management, Xtent high-speed constraint manager, and 35-plus translators and interfaces that facilitate complete environment migration.
Altium: Altium Designer is our only tool. We believe design processes should be centered around a single unified design tool that operates on a single, unified data model. As a consequence, schematic, PCB layout, signal integrity, circuit simulation, CAM, embedded programming, and FPGA design are all handled from one tool. The greatest benefit of using a unified design tool is not just the efficiency and synchronization advantages brought about by a unified data model. This is especially important when coordinating parallel development of embedded software, FPGA hardware and board layout. These design processes all have cross-dependencies that must be kept in sync in order to build a successful product.
National Instruments: Currently in the NI Multisim toolbox is the ability to create custom analysis instruments. This provides a level of flexibility for simulation and validation not normally possible in other simulation environments. We have created a “development environment” where our simulation engine can be leveraged for customized analysis from the simple to the complex, and finally, the plain interesting (a custom “elevator” instrument for educators to teach students about voltage dividers).
Cadence: Allegro Global Route Environment, with its unique hierarchical interface-level (DDR3, PCI-Gen2, SATA, etc.) interconnect flow planning and implementation technology, enables designers to get handcrafted results in fraction of the time while following extensive signal integrity and DfM rules. The flow planning technology steps users through basic steps of planning the design, checking the plan feasibility, and then moving on to topological planning and accurate routing.
EMA: EMA recently acquired CircuitSpace, a unique reuse and placement tool. This tool was designed by PCB designers for PCB designers, and it shows. CircuitSpace has taken the tasks best suited for automation and allows the user to leverage these capabilities by applying their design knowledge to guide and control the tool. This gives designers all the advantages and time savings that come with automation, without limiting design options.
What do users take for granted about EDA tools or suppliers?
Cadence: Integration across the design flow, and logic authoring to implementation without customization. Also, skilled technical field resources to help adoption and optimization to company-specific infrastructures.
Mentor: PCB system design tools are often viewed as a commodity. If you take a check-in-the-box approach, every tool can do everything (almost). You theoretically could design a complex PCB with an etch-a-sketch. What it comes down to is, Do I have the right design tools to get my competition-beating product to market in time to hit my aggressive window of opportunity at reduced development costs?
Intercept: Users tend to focus on their needs, their problems, and rightfully so, since they’re paying maintenance for support. But they have a hard time understanding we can only fix or enhance so much in a certain amount of time. We are forced to prioritize needs based on the needs of the many, which sometimes makes the few unhappy.
Altium: I think the question should be, What should users expect from their vendors, and are they getting what they expect and need? Users should get the fullest of feature sets, a low price tag, an intuitive learning curve, no integration (because a single application should cover every aspect of electronics design and test), no add-ons for the same reason, continuous development, regular updates, and responsive experts.
National Instruments: As an industry, EDA companies really do need to facilitate the best practices in the design flow. For far too long we have provided tools that are functional, with the capability to improve design. We are now starting to see the paradigm shift of EDA companies making design tools easier to use. This has meant the adoption of applications such as simulation to aid the design of PCBs. We have made a commitment to providing engineers with the platform for development that combines powerful analysis, while remaining easy and intuitive.
EMA: One of the big items users take for granted initially is having correct and accurate part data upfront. I always believed in the saying “garbage in, garbage out,” and even the best tool will fail when fed bad data. Managing these data often is seen as someone else’s problem or a secondary task for engineering when it’s just the opposite. Having correct, accurate data at the engineering level is where it matters most! The design phase is where you can make changes or fix problems with the least amount of cost (in both dollars and time). If you are designing with correct tools and correct data, you can confidently make design decisions.
What tool or types of tool(s) need to be improved for today’s designs or design process?
Altium: The nature of design is changing. Convergent electronic products can’t be effectively designed with divergent tools. Connected devices can’t be easily developed unless connectivity is a native function of the design system. Improving one type of tool won’t get us to where we need to be. We need to raise the overall level of abstraction at which designers can work. And that means coming up with a new generation of tools that eliminate the barriers imposed by silos of design functions.
National Instruments: The EDA industry has forgotten at times that the design flow needs to be considered holistically. We have found that we need to help engineers from concept to schematic, to simulation, through layout, fabrication and validation. Anything hindering the user’s transition to each stage diminishes productivity.
We need to facilitate faster and smarter design. We have come a long way as an industry in making tools powerful enough to cope with ever more complex design tasks. However, it is not until we look to the design flow holistically, and provide that integrated flow, that we truly help our customers’ productivity.
EMA: Better tools/processes need to be available to provide more design and corporate data to the engineer’s desktop. Often, engineers design products in a vacuum when it comes to parts selection. Engineers need to be empowered to make cost as well as design decisions at the concept and development stage. If engineers are given the tools to help them weigh cost and performance upfront, the overall design ultimately will be optimized. The more information engineers can have at their fingertips at the beginning, the better the chance of success for your design goals.
Intercept: Tough question, because all our tools are changing all the time to support changes in the design world. But I would say we’re seeing a greater need for high-speed design options. RF or mixed digital-analog-RF environments are starting to take over a larger sector of the market. Another area that needs improving is design reuse. Repeatable circuits or portions of circuits need to be copied/pasted, rather than requiring the designer to continually repeat their work. But the circuits also need to retain intelligence.
Mentor: Developing an electronics product requires more than the efficient design of the PCB. Multiple other disciplines are part of the development process: FPGA, ASIC and package design, RF (the design and simulation is unique), mechanical design and analysis of the enclosure and the PCB(s) in that enclosure, software, procurement, manufacturing, test. Yes, we need to continue to add productivity and the latest technologies to the PCB design system, but we also must enable concurrent collaboration between the PCB designer and these other disciplines. These collaboration capabilities must be electronic, bi-directional, real time, and with interfaces that do not force a discipline to learn a new language or present decisions to be made in a form that is foreign.
Is there an emerging technology that will demand a fundamental change to PCB design or manufacturing?
Intercept: There are a great many drivers, in many industries. Rather than one big shakeup in the design/manufacturing process, we’ll see a proliferation of many specialized processes. We’re already seeing it, with RF designs being accomplished more often in the intelligent tools, rather than the old CAD drawing packages. The same is happening with hybrid designs, where people are trying to customize CAD packages to be smarter, and spending tremendous overhead to do so.
Altium: The next disruptive change to hit the PCB design community, and it’s already under way, is in the area of programmable technologies such as FPGAs. FPGAs do for PCB designers what microprocessors did for digital designers 30 years ago. While the traditional use of FPGAs has been in the areas of bleeding edge designs that are one step short of ASICs, the reality is that each new generation of FPGA device brings us higher levels of capability for even lower cost.
On another level, true 3-D editing capabilities in real time are, in our view, mandatory. Design mistakes such as solder mask and silkscreen errors almost jump right off the monitor at you when you see them in 3-D.
Mentor: We see several emerging technologies that in the past were reserved for the highest-end, most-expensive products. These include HDI/microvias, embedded passives and actives, chip-on-board (flip chip, wirebond and stacked die), cavities, and system-in-package (SiP). Today these are becoming much more affordable and attractive to all electronics industries.
National Instruments: Productivity and efficiency will continue to be a major factor in driving the vision for EDA tools and suppliers. This will require continuing to streamline the design flow through improved integration. Second, we will continue to see a movement of engineers to embedded technology to deploy the “brains” of their designs. We have seen that with FPGAs. We will continue to move in the direction of co-design between the embedded device and the PCBs that will help to interface that IC to the real-world signals.
How long will it take for this “emerging technology” to begin to challenge existing tools and demand a change in tools and/or process?
National Instruments: We already are at the beginning of this change. Tools and EDA suppliers have begun the process to meet the needs of both an integrated design flow, as well as co-design.
Mentor: Agreed. The challenge is to stay ahead of the productivity curve and supply a level of high automation within the design system. Again, the difference between a commodity tool and a tool like Mentor’s.
Intercept: It’s really unknown. We can guess that RF design, high-speed design, hybrid design will be taking a larger share of the market, and we can try to provide for that. But it’s up to us to keep reading headlines and coordinating with our user base to see where things actually turn out.
This industry tends to be a bit unpredictable, which puts the software vendor in a more reactive position with the market/design demands on the offensive. But at the same time, the vendors are working to drive needs as well; even if no emerging technology were presenting itself, the software vendor could create tools to improve on existing methods and market their time savings to create a new need within a known quantity.
Cadence: For PCB, I would say miniaturization through HDI and embedded devices (passives and actives) on innerlayers, and closer collaboration between ECAD and MCAD. In the packaging world, miniaturization and higher scale integration is achieved through 3-D ICs with through-silicon vias and silicon interposers.
Altium: I wouldn’t say FPGAs are mainstream just yet. The perception that FPGAs are expensive and difficult to use is heavily ingrained, and requires continuing education and experience of FPGAs firsthand. But we believe it will happen. The reasons are compelling, and it is simply an extrapolation of the same shift toward soft design that has made microprocessors ubiquitous. Currently we are somewhat dependent on the speed that major FPGA vendors can integrate hard processors into their low-cost devices to bring us to the tipping point. But we anticipate the next 12 to 24 months to be very telling.
What special issue(s) does this emerging technology bring that existing tools cannot handle?Mentor: Most tools enable a designer to use HDI and manually fan and break out from a high pin count, small pitch BGA. Following the techniques outlined in Charles Pfeil’s book, a design can define an HDI fan-out strategy and in seconds implement that strategy on the BGA. Then automatically complete the breakout with equal automation.
For embedded passives, the typical method is to pre-define a library of passive components and then manually place those components on the board innerlayers. Our alternative is to a) determine which passives should be embedded and which discrete; b) automatically synthesize each passive based on characterization data from the material supplier; and c) place the passives on the appropriate layers.
Intercept: For RF design, the advanced tools are far too rigid. RF designers need flexibility, but they also need design rule checks. Meeting in the middle is a challenge. For hybrid design, it’s a similar problem. They need more flexibility, but they also need support for the specialized materials, wirebonding techniques, and z-axis changes that don’t tend to occur as much in standard PCB design. We’ve dealt with these challenges, but are now refining them to look and feel more like what these RF and hybrid users expect and want.
Altium: By approaching FPGA design from the perspective of a PCB developer, we have significantly lowered the barriers to adoption. By including a range of high-level IP blocks similar to what a PCB designer typically would find in a microprocessor and peripherals databook, designers can build sophisticated systems using the very same schematic capture skills they use to design PCBs. Altium Designer’s unified approach to PCB, FPGA and embedded software development ensures design synchronization across the domains just works. Changes in any one domain are automatically propagated to the other domains without the need to manually export and import interface files between disparate point tools.
National Instruments: The issues surrounding this movement toward both integration and co-design are driven by the needs and profile of the research engineer. Those involved in research are effectively domain experts, responsible for being able to prototype a design. They are not layout engineers or embedded developers and, as such, need to have tools that allow them to be productive without needing a Ph.D. in a specific design task. We see the ever-changing role of the engineer dictate a movement toward tools that abstract away unnecessary difficulties, but retain the advanced functionality for design. This is true, whether for the layout and validation of a PCB, or the deployment of logic to an embedded design.
Is this tool in development now?
Mentor: These tools exist, but we are continually enhancing to improve their productivity and handle technology changes.
Intercept: Yes. Major improvements in RF design should be coming out in the next few months. Hybrid and high-speed design are an ongoing effort.
Altium: Of course! Altium Designer has been the product of consistent and continual development for nearly 25 years. It remains the primary focus of our development, and we do not see that changing in the foreseeable future. All new functionality developed by Altium will eventually find its way into Altium Designer.
National Instruments: Yes, as we noted, the solution has been available for the past few years, but continues to be streamlined in order to make these tasks easier.
Pete Waddell is the design technical editor of PCD&F (pcdandf.com); pwaddell@upmediagroup.com.
Embedded in fabrication planning is calculating panel size, checking layer stackup information, reviewing expected yields, reviewing board construction and verifying impedance control calculations.
Typical panel sizes are 9 x 12˝, 12 x 18˝, 18 x 24˝, or 18 x 36˝. A number of factors need to be considered when calculating panel size. For instance, consider a small board of 25 sq. in. A relatively high number of this small board can be panelized in an 18 x 24˝ panel. But board complexity and density, or such factors as high-speed signals, trace thicknesses, or controlled impedance, could favor a 9 x 12˝ panel.
Stackup calculation is another planning aspect. Figure 1 shows the construction of an eight-layer board stackup with properly calculated layer and prepreg thickness. Stackup depends on the number of layers, the construction design, and the prepregs. It’s important to understand how a PCB’s layers and prepregs are constructed because they come in different amounts of copper. They also come in different thicknesses, and depending on the number of layers, board construction can change, thereby either increasing or decreasing yield.
When impedance control calculations are involved, the CAM engineer should work closely with design engineers.
Innerlayer registration. Buried capacitance (or buried resistance) is a technique sometimes applied when there is no available surface real estate to place passive components or when placing them creates noise that cannot be suppressed. In such instances, innerlayer registration requires special attention. Extremely thin prepregs (in the range of 0.002˝) demand careful handling. It is very hard to align such thin prepreg material during internal layer lamination process.
CAM engineers must ensure internal layers are properly registered, taking into account potential shifts occurring in layer construction. Fine-pitch devices require careful attention because they use extremely thin traces, thus posing impedance calculation issues. AOI is a solution here. AOI can check for internal shorts or opens before or even after boards are laminated, although changes after the latter are expensive.
If mechanical drills are used for holes in the range of 0.006˝ to 0.009˝, extra-fine drill bits with extremely tight tolerances are required. Also, routing issues come into play when components are stacked toward the board edge. If the tolerances are not tight, the drilled holes can encroach into other areas, possibly damaging traces or pads.
A word of caution. It’s not a good idea to stretch the technology. Put another way, a fabricator may not have the most advanced technology in-house. If outdated equipment is pushed beyond its limits, fabrication yields may decrease. For example, an older mechanical drill may be designed to form 0.008˝ holes, but the design calls for 0.005˝ holes. The situation may call for a laser drill, as mechanical drills lack the precise tolerance needed, which could result in overly large or wide drilled holes. Cutting into other traces or creating opens or shorts jeopardizes board integrity. It’s better to match the technology to the level of board fabrication complexity.
Manufacturing practices. In board fabrication, good manufacturing practices go hand-in-hand with advanced technologies. Those preventive maintenance practices are synonymous with maintaining and properly and frequently calibrating fabrication equipment and systems. Precise calibrations are critical for ensuring proper drilling, routing, etching, and maintaining plating and etching chemistries. Another best practice to increase fabrication yield is copper thieving. It is used to balance the copper on the PCB surface, making the etching uniform and thereby reducing the chances of board warpage (Figure 2).
First-article creation and inspection represents yet another important aspect that can tremendously improve fabrication yields. At the beginning stage, after CAM planning is done, the fabricator should create a first article by aligning all the drill holes with through-hole pads, creating drilling and routing files, and checking power and ground planes for opens and shorts. A first-article board is then built to make sure all the critical factors are properly addressed.
Chemistries. A fabricator has an assortment of chemical tanks. Maintaining effective chemistry balance is vital in etching tanks and plating lines. It is always a good idea for a fabricator to maintain an in-house chemical laboratory that can frequently monitor the chemistry in each bath. Some types of chemistry require checking every day – others every two to three days, depending on their processes and critical elements constituting those chemistries. Maintaining proper chemistries can boost board yield. If tank chemistries are not monitored properly, it can cause contamination, thereby creating uneven plating (Figure 3).
Finally, advanced fabrication equipment technology and preventive maintenance are inextricably intertwined; one isn’t effective without the other. Proper calibrations and maintenance are demanded when fabricators perform special builds such as countersink holes, back or stub drilling, or sequential laminations.
Zulki Khan is president and founder of Nexlogic Technologies (nexlogic.com); zk@nexlogic.com.