Leading EDA suppliers debate design and layout needs.
The Face-to-Face sessions of PCB West’s pasts are but a memory, but that doesn’t mean the industry’s EDA suppliers should consider themselves free and clear.
This is the first in a series of features on EDA tools that we plan to publish in 2010. This first survey was intended to concentrate on general design and layout tools. But intent and reality sometimes conflict. Interestingly, several respondents felt FPGAs will have a growing impact on PCB design, so some of their answers deal with things outside pure board layout.
In the coming months we’ll concentrate on design entry tools, simulation tools and backend design verification/manufacturability tools. If there is a case to be made for other categories of tools, we’ll include them also.
For this article, we spoke with John Isaac of Mentor Graphics, Hemant Shah of Cadence, Abby Monaco of Intercept Technology, Manny Marcano of EMA Design Automation, Dr. Marty Hauff at Altium, and Bhavesh Mistry at National Instruments. Due to the number and length of the answers, we’ve truncated this report. For a full version, visit pcdandf.com. Note: To comment on this feature, visit our Laying It Out blog at pcdandf.blogspot.com.
What is the most impressive tool in your current toolbox?
Mentor: Mentor has unique technology for enabling true concurrent design and design team collaboration. Typical concurrent design in other systems is enabled by a split-and-join process, where a database is divided among the engineers or designers, edited, and then put back together via a manual and error-prone process. Our approach provides true concurrency for schematic entry, constraint entry, layout and manufacturing data generation, where designers are editing a common database at the same time over a LAN or WAN, and are able to see their peers’ edits in real-time.
Intercept: Intercept’s Pantheon layout design application is a leader in PCB, RF, hybrid, high speed, SiP, analog, digital, and mixed-signal designs within a single application. Pantheon’s advanced system generates and verifies artwork and manufacturing rules, and enables flexible shape and fill manipulation, design reuse with block technology, automatic creation and management of high-speed constraints and signal paths, and layout-driven design capabilities. As part of a complete environment solution, Pantheon offers full integration with Mozaix schematic, Indx library management, Xtent high-speed constraint manager, and 35-plus translators and interfaces that facilitate complete environment migration.
Altium: Altium Designer is our only tool. We believe design processes should be centered around a single unified design tool that operates on a single, unified data model. As a consequence, schematic, PCB layout, signal integrity, circuit simulation, CAM, embedded programming, and FPGA design are all handled from one tool. The greatest benefit of using a unified design tool is not just the efficiency and synchronization advantages brought about by a unified data model. This is especially important when coordinating parallel development of embedded software, FPGA hardware and board layout. These design processes all have cross-dependencies that must be kept in sync in order to build a successful product.
National Instruments: Currently in the NI Multisim toolbox is the ability to create custom analysis instruments. This provides a level of flexibility for simulation and validation not normally possible in other simulation environments. We have created a “development environment” where our simulation engine can be leveraged for customized analysis from the simple to the complex, and finally, the plain interesting (a custom “elevator” instrument for educators to teach students about voltage dividers).
Cadence: Allegro Global Route Environment, with its unique hierarchical interface-level (DDR3, PCI-Gen2, SATA, etc.) interconnect flow planning and implementation technology, enables designers to get handcrafted results in fraction of the time while following extensive signal integrity and DfM rules. The flow planning technology steps users through basic steps of planning the design, checking the plan feasibility, and then moving on to topological planning and accurate routing.
EMA: EMA recently acquired CircuitSpace, a unique reuse and placement tool. This tool was designed by PCB designers for PCB designers, and it shows. CircuitSpace has taken the tasks best suited for automation and allows the user to leverage these capabilities by applying their design knowledge to guide and control the tool. This gives designers all the advantages and time savings that come with automation, without limiting design options.
What do users take for granted about EDA tools or suppliers?
Cadence: Integration across the design flow, and logic authoring to implementation without customization. Also, skilled technical field resources to help adoption and optimization to company-specific infrastructures.
Mentor: PCB system design tools are often viewed as a commodity. If you take a check-in-the-box approach, every tool can do everything (almost). You theoretically could design a complex PCB with an etch-a-sketch. What it comes down to is, Do I have the right design tools to get my competition-beating product to market in time to hit my aggressive window of opportunity at reduced development costs?
Intercept: Users tend to focus on their needs, their problems, and rightfully so, since they’re paying maintenance for support. But they have a hard time understanding we can only fix or enhance so much in a certain amount of time. We are forced to prioritize needs based on the needs of the many, which sometimes makes the few unhappy.
Altium: I think the question should be, What should users expect from their vendors, and are they getting what they expect and need? Users should get the fullest of feature sets, a low price tag, an intuitive learning curve, no integration (because a single application should cover every aspect of electronics design and test), no add-ons for the same reason, continuous development, regular updates, and responsive experts.
National Instruments: As an industry, EDA companies really do need to facilitate the best practices in the design flow. For far too long we have provided tools that are functional, with the capability to improve design. We are now starting to see the paradigm shift of EDA companies making design tools easier to use. This has meant the adoption of applications such as simulation to aid the design of PCBs. We have made a commitment to providing engineers with the platform for development that combines powerful analysis, while remaining easy and intuitive.
EMA: One of the big items users take for granted initially is having correct and accurate part data upfront. I always believed in the saying “garbage in, garbage out,” and even the best tool will fail when fed bad data. Managing these data often is seen as someone else’s problem or a secondary task for engineering when it’s just the opposite. Having correct, accurate data at the engineering level is where it matters most! The design phase is where you can make changes or fix problems with the least amount of cost (in both dollars and time). If you are designing with correct tools and correct data, you can confidently make design decisions.
What tool or types of tool(s) need to be improved for today’s designs or design process?
Altium: The nature of design is changing. Convergent electronic products can’t be effectively designed with divergent tools. Connected devices can’t be easily developed unless connectivity is a native function of the design system. Improving one type of tool won’t get us to where we need to be. We need to raise the overall level of abstraction at which designers can work. And that means coming up with a new generation of tools that eliminate the barriers imposed by silos of design functions.
National Instruments: The EDA industry has forgotten at times that the design flow needs to be considered holistically. We have found that we need to help engineers from concept to schematic, to simulation, through layout, fabrication and validation. Anything hindering the user’s transition to each stage diminishes productivity.
We need to facilitate faster and smarter design. We have come a long way as an industry in making tools powerful enough to cope with ever more complex design tasks. However, it is not until we look to the design flow holistically, and provide that integrated flow, that we truly help our customers’ productivity.
EMA: Better tools/processes need to be available to provide more design and corporate data to the engineer’s desktop. Often, engineers design products in a vacuum when it comes to parts selection. Engineers need to be empowered to make cost as well as design decisions at the concept and development stage. If engineers are given the tools to help them weigh cost and performance upfront, the overall design ultimately will be optimized. The more information engineers can have at their fingertips at the beginning, the better the chance of success for your design goals.
Intercept: Tough question, because all our tools are changing all the time to support changes in the design world. But I would say we’re seeing a greater need for high-speed design options. RF or mixed digital-analog-RF environments are starting to take over a larger sector of the market. Another area that needs improving is design reuse. Repeatable circuits or portions of circuits need to be copied/pasted, rather than requiring the designer to continually repeat their work. But the circuits also need to retain intelligence.
Mentor: Developing an electronics product requires more than the efficient design of the PCB. Multiple other disciplines are part of the development process: FPGA, ASIC and package design, RF (the design and simulation is unique), mechanical design and analysis of the enclosure and the PCB(s) in that enclosure, software, procurement, manufacturing, test. Yes, we need to continue to add productivity and the latest technologies to the PCB design system, but we also must enable concurrent collaboration between the PCB designer and these other disciplines. These collaboration capabilities must be electronic, bi-directional, real time, and with interfaces that do not force a discipline to learn a new language or present decisions to be made in a form that is foreign.
Is there an emerging technology that will demand a fundamental change to PCB design or manufacturing?
Intercept: There are a great many drivers, in many industries. Rather than one big shakeup in the design/manufacturing process, we’ll see a proliferation of many specialized processes. We’re already seeing it, with RF designs being accomplished more often in the intelligent tools, rather than the old CAD drawing packages. The same is happening with hybrid designs, where people are trying to customize CAD packages to be smarter, and spending tremendous overhead to do so.
Altium: The next disruptive change to hit the PCB design community, and it’s already under way, is in the area of programmable technologies such as FPGAs. FPGAs do for PCB designers what microprocessors did for digital designers 30 years ago. While the traditional use of FPGAs has been in the areas of bleeding edge designs that are one step short of ASICs, the reality is that each new generation of FPGA device brings us higher levels of capability for even lower cost.
On another level, true 3-D editing capabilities in real time are, in our view, mandatory. Design mistakes such as solder mask and silkscreen errors almost jump right off the monitor at you when you see them in 3-D.
Mentor: We see several emerging technologies that in the past were reserved for the highest-end, most-expensive products. These include HDI/microvias, embedded passives and actives, chip-on-board (flip chip, wirebond and stacked die), cavities, and system-in-package (SiP). Today these are becoming much more affordable and attractive to all electronics industries.
National Instruments: Productivity and efficiency will continue to be a major factor in driving the vision for EDA tools and suppliers. This will require continuing to streamline the design flow through improved integration. Second, we will continue to see a movement of engineers to embedded technology to deploy the “brains” of their designs. We have seen that with FPGAs. We will continue to move in the direction of co-design between the embedded device and the PCBs that will help to interface that IC to the real-world signals.
How long will it take for this “emerging technology” to begin to challenge existing tools and demand a change in tools and/or process?
National Instruments: We already are at the beginning of this change. Tools and EDA suppliers have begun the process to meet the needs of both an integrated design flow, as well as co-design.
Mentor: Agreed. The challenge is to stay ahead of the productivity curve and supply a level of high automation within the design system. Again, the difference between a commodity tool and a tool like Mentor’s.
Intercept: It’s really unknown. We can guess that RF design, high-speed design, hybrid design will be taking a larger share of the market, and we can try to provide for that. But it’s up to us to keep reading headlines and coordinating with our user base to see where things actually turn out.
This industry tends to be a bit unpredictable, which puts the software vendor in a more reactive position with the market/design demands on the offensive. But at the same time, the vendors are working to drive needs as well; even if no emerging technology were presenting itself, the software vendor could create tools to improve on existing methods and market their time savings to create a new need within a known quantity.
Cadence: For PCB, I would say miniaturization through HDI and embedded devices (passives and actives) on innerlayers, and closer collaboration between ECAD and MCAD. In the packaging world, miniaturization and higher scale integration is achieved through 3-D ICs with through-silicon vias and silicon interposers.
Altium: I wouldn’t say FPGAs are mainstream just yet. The perception that FPGAs are expensive and difficult to use is heavily ingrained, and requires continuing education and experience of FPGAs firsthand. But we believe it will happen. The reasons are compelling, and it is simply an extrapolation of the same shift toward soft design that has made microprocessors ubiquitous. Currently we are somewhat dependent on the speed that major FPGA vendors can integrate hard processors into their low-cost devices to bring us to the tipping point. But we anticipate the next 12 to 24 months to be very telling.
What special issue(s) does this emerging technology bring that existing tools cannot handle?Mentor: Most tools enable a designer to use HDI and manually fan and break out from a high pin count, small pitch BGA. Following the techniques outlined in Charles Pfeil’s book, a design can define an HDI fan-out strategy and in seconds implement that strategy on the BGA. Then automatically complete the breakout with equal automation.
For embedded passives, the typical method is to pre-define a library of passive components and then manually place those components on the board innerlayers. Our alternative is to a) determine which passives should be embedded and which discrete; b) automatically synthesize each passive based on characterization data from the material supplier; and c) place the passives on the appropriate layers.
Intercept: For RF design, the advanced tools are far too rigid. RF designers need flexibility, but they also need design rule checks. Meeting in the middle is a challenge. For hybrid design, it’s a similar problem. They need more flexibility, but they also need support for the specialized materials, wirebonding techniques, and z-axis changes that don’t tend to occur as much in standard PCB design. We’ve dealt with these challenges, but are now refining them to look and feel more like what these RF and hybrid users expect and want.
Altium: By approaching FPGA design from the perspective of a PCB developer, we have significantly lowered the barriers to adoption. By including a range of high-level IP blocks similar to what a PCB designer typically would find in a microprocessor and peripherals databook, designers can build sophisticated systems using the very same schematic capture skills they use to design PCBs. Altium Designer’s unified approach to PCB, FPGA and embedded software development ensures design synchronization across the domains just works. Changes in any one domain are automatically propagated to the other domains without the need to manually export and import interface files between disparate point tools.
National Instruments: The issues surrounding this movement toward both integration and co-design are driven by the needs and profile of the research engineer. Those involved in research are effectively domain experts, responsible for being able to prototype a design. They are not layout engineers or embedded developers and, as such, need to have tools that allow them to be productive without needing a Ph.D. in a specific design task. We see the ever-changing role of the engineer dictate a movement toward tools that abstract away unnecessary difficulties, but retain the advanced functionality for design. This is true, whether for the layout and validation of a PCB, or the deployment of logic to an embedded design.
Is this tool in development now?
Mentor: These tools exist, but we are continually enhancing to improve their productivity and handle technology changes.
Intercept: Yes. Major improvements in RF design should be coming out in the next few months. Hybrid and high-speed design are an ongoing effort.
Altium: Of course! Altium Designer has been the product of consistent and continual development for nearly 25 years. It remains the primary focus of our development, and we do not see that changing in the foreseeable future. All new functionality developed by Altium will eventually find its way into Altium Designer.
National Instruments: Yes, as we noted, the solution has been available for the past few years, but continues to be streamlined in order to make these tasks easier.
Pete Waddell is the design technical editor of PCD&F (pcdandf.com); This email address is being protected from spambots. You need JavaScript enabled to view it..
