AUSTIN, TX – The adoption of flip chip and wafer level packaging continues to expand to a wide range of devices, says TechSearch International. The firm projects a compound annual growth rate of more than 15% for flip chip units. In unit volumes, WLPs are expected to see a 12.48% CAGR from 2009 to 2014.
The drivers for flip chip continue to be performance, on-chip power distribution, pad-limited designs, and form factor requirements. The use of FCIP is expanding for microprocessors, ASICs, field programmable gate arrays, DSPs, media devices, chipsets, and graphics chips. Driven by form factor, many wireless products are adopting flip chip interconnect. Solder bumped devices are found in applications such as automotive electronics, computers and peripherals, telecommunications, and consumer products. TechSearch projects strong growth for Cu pillar and 300 mm bumping.
The growth in WLPs is driven by increased demand for thinner, lighter-weight portable products, but WLPs are adopted for form factor, performance and cost-reduction reasons. The industry has seen an increase in shipments of analog devices such as power amplifiers, audio CODEC, integrated power management controllers, ring tones for mobile phones, MOSFETs, image sensors, wireless, and integrated passive devices.
WLPs have historically been used for low-pin-count (≤100 I/O) applications, but many companies plan to use WLPs for higher-pin-count applications with larger die sizes (7 mm x 7 mm or larger), according to the firm.
An increasing number of companies are interested in fan-out WLPs. Fan-out WLPs are a package option for devices with a large number of I/Os that cannot be accommodated by a fan-in design. The use of a fan-out solution provides the same low-profile advantage as the conventional WLP, says TechSearch.