DDR Debug Toolkit, for complete physical layer analysis of DDR 2/3/4 and LPDDR2/3 signals, provides test, debug and analysis tools for the entire DDR design cycle. Read and Write bursts can be separated and eye diagrams for each can be displayed in real time, providing unique insight to system performance with a single push-button. Identifies root causes of problems with jitter analysis specifically designed for bursted DDR signals that conventional serial data tools cannot analyze. Includes a variety of built-in DDR-specific measurement parameters, enabling easy quantitative analysis of system performance. Performs DDR analysis simultaneously over four different measurement scenarios, improving DDR testing efficiency and providing faster results. Displays up to 10 eye diagrams simultaneously. Multi-measurement scenario analysis capability lends itself to optimization and tuning of system and device performance, while the built-in measurements provide characterization benchmarks for precompliance testing. For testing to JEDEC standards, analysis tools can be leveraged to perform margin testing and to troubleshoot failures which arise during compliance testing. Provides alternative to automated DDR compliance test packages for times when full compliance testing is not required.

Teledyne LeCroy, teledynelecroy.com

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