Printed Circuit Design & Fab Online Magazine - Designing PCBs With Mixed Materials

Mixing the right high-speed, high-frequency materials can improve your board design and keep costs down. But it pays to talk to your board shop.

It's a fact that some PCB base materials offer better thermal, mechanical, functional or high-frequency performance than others. The higher-performance materials also carry a higher price tag than the FR-4 spectrum and other similar materials. By mixing base materials in a board stack we can sometimes get the best of both worlds - improved performance with a low to moderate cost.

To detail all the reasons why we might mix PCB materials would take a book, not a feature article. Therefore, we will focus on one of the more common reasons to mix things up in these days of high-speed and high-frequency designs: the need to attain improved high-frequency performance, at a moderate cost.

Pros and Cons

Materials designed for high-speed and high-frequency applications offer a number of advantages over FR-4 and similar materials. Among the improved properties always listed for high-speed/high-frequency (HS/HF) materials are tightly controlled Er (dielectric constant), lower and more stable loss tangent and tight control of dielectric thickness. Properties often mentioned are improved X, Y and Z axis stability, lower coefficient of thermal expansion (CTE), low Er (sometimes intentionally high Er), copper styles that offer lower skin effect losses (rolled/annealed or low profile ED), higher thermal conductivity and a CTE matched to copper.

Elements of the circuit that are usually viewed with a diligent eye in HS/HF designs are impedance control and signal loss. The material properties with significant impact on these elements are Er, dielectric thickness, loss tangent and, in critical cases, copper type. There are a number of ways to blend HS/HF materials with FR-4, and other low-price materials, to achieve control of critical properties at a low to moderate cost.

One of the most basic stackups to utilize mixed dielectrics is the four-layer design shown in Figure 1.

FIGURE 1. A four-layer microstrip stackup with mixed dielectrics.

In this design, all the outer layer circuitry (top and bottom) has the advantage of referencing a return plane through a low-loss, low Er, tightly controlled HF dielectric (Rogers 4003/4350 or Arlon 25 or Taconic RF-35). This structure offers good impedance control, very low signal loss into the dielectric (approx 1/10 that of FR-4) and signal propagation speeds about 10% faster than FR-4. All that, and yet much of the board is a low-cost dielectric. This approach can lower overall board cost by as much as 25%, depending on the thickness of the HF dielectrics compared to the FR-4 in the center.

Many HF analog designs in the multiple GHz range utilize this structure. In such an application, the top and bottom do not have to be a thermoset plastic. Any HF material that can be fully bonded with FR-4 could be used. Excellent material choices would be Rogers 3000 Series or 6000 Series or Taconic's TLG series or any of the similar materials from Arlon.

One disadvantage of this structure, due to tight impedance control in analog circuits, is the need for tight dielectric thickness control of the outer layers. This requires the board be "core laminated," which adds some cost back into the mix, since two cores have to be processed, as opposed to one in a "foil laminated" stack. Even with this cost adder, the overall design is still much cheaper than a similar design utilizing only HF materials.

One prepreg that would allow foil lamination, with tight thickness control, low loss and a very low Er is Speedboard C (W. L. Gore & Associates). This prepreg material can be controlled in thickness almost as well as the cores of most materials. Speedboard C is more expensive than the thermosets and similar materials, but given the ability to foil laminate, creates an overall design of approximately the same cost as a core construction using other HF materials. Though this material has slightly higher loss of signal into the dielectric (still way below FR-4), with an Er around 2.6 to 2.7 (effective relative Er for the transmission line of 2.13) the design nets a transmission line with a propagation rate 25% faster than FR-4.

This basic structure can also be utilized in digital circuits that must be four layers, where all traces will be microstrip (outer layer). Such digital applications have two advantages over their analog cousins. Since digital circuits are more tolerant of signal losses, the material used for the outer layers does not have to be a high-cost HF dielectric, but can be any of the spectrum of HS materials available from Isola, Nelco or PolyClad. That is, any of these materials that will bond well with FR-4 and other low cost cores. Also, because digital circuits are more tolerant of slight impedance discontinuities, the outer layers can be prepreg (lower thickness control), netting a standard foil construction. These combined advantages offer a design capable of working at much higher frequency, with only a modest cost increase compared to a board of only FR-4.

Going Digital

In digital applications, another four-layer stack up that optimizes performance, with moderate cost increase over an all-FR-4 board, is that shown in Figure 2. This structure boasts many of the same advantages as the board in Figure 1, with the added advantage of lower crosstalk and potentially lower EMI (stripline versus microstrip). To ensure lower crosstalk, route layers 2 and 3 in orthogonal directions (X and Y). If traces were to route over one another in the same direction, there's a distinct risk of increasing, not lowering, crosstalk.

FIGURE 2. A four-layer stripline stackup with mixed dielectrics.

Another advantage of Figure 2 is the ease of impedance control by the PCB fabricator. Inner layer traces are a "print and etch" process compared to the "print, plate and etch" processes needed for outer layers, offering improved trace width accuracy, hence the ease of impedance control.

To help make impedance consistent in this stackup, make layers 1 and 4 ground planes and pour copper on all unused areas of the signal layers (2 and 3). Attach all poured copper areas on the inner layers to the power rail(s) (3.3V, 5V, etc.). This will create a pseudoimage of a solid plane structure both above and below the signals on layers 2 and 3. Of course this is not a perfect structure and should not be used with very sensitive analog circuits. This works well, however, in most digital applications, because digital devices often have a broad enough noise budget to tolerate moderate impedance discontinuities.

To reap maximum benefit of the HS material in the outer layers, the signals on layers 2 and 3 must couple much more heavily to layers 1 and 4 than to each other. In other words, most of the energy in the transmission lines must be drawn through the low Er, low-loss material on the outer layers or there will be no real benefit to using this structure. That is only possible when the FR-4 dielectric is at least three times thicker than the dielectric between layers 1 and 2, and layers 3 and 4. Making the center dielectric much thicker will also encourage foil lamination, adding to the cost benefit of this stackup.

One gotcha with the structure in Figure 2 is the reality that impedance is determined by the energy coupling through two different dielectrics, with potentially much different dielectric constants (Er). This fact makes resolving impedance more complicated. The ultimate solution is to determine the impedance value using a field solver capable of dealing with mixed dielectrics. My personal choice for this is the Polar 8000 or Polar 9000 Solver. In reality, any field solver capable of mixing dielectrics would do the job.

Figure 3 shows a snapshot of a stack with different dielectrics in the Polar 9000 Solver. As can be seen, tools such as this allow the designer to blend materials of virtually any Er mixture, and accurately determine impedance of all the transmission lines in the structure.

FIGURE 3. This field solver is designed to account for different dielectrics in the board stack.

When such tools are not available, the designer must find other means to calculate effective relative Er (Eeff). There are a couple of simple equations available on the Internet to accomplish this task. These equations are close approximations, at best. In the absence of all else, the designer can contact a PCB fabricator who routinely deals in mixed dielectrics, to get assistance calculating Eeff.

The concept behind the board structures in Figures 1 and 2 can be carried to as many layers as needed. A high layer-count board can have just its outer dielectrics made of HF material, with all critical analog circuitry routed on the top and bottom (layer 1 and layer N) and all other signals routed inside the board. In such a structure, layer 2 and layer N-1 should be ground planes, to accommodate tighter impedance control and to give all critical signals a return reference through the low-loss dielectric.

A high layer-count board can also be structured with alternating layers of FR-4 and HS materials. As the layer-to-layer thickness of both the FR-4 and HS dielectrics becomes balanced, the benefit gained by using an HS material is severely diluted. For this reason it's imperative that the distance to the planes, through the HS material, be thin compared to the distance to the planes through FR-4. When the FR-4 is three to four times thicker (min) than the HS material, the majority of the signal energy couples through the HS material, giving maximum benefit. Also, if the majority of the board material is FR-4, there will be a sizable cost advantage (the reason we do this in the first place). As you determine where each dielectric will reside in the board, keep in mind that balanced construction is another key to making a producible board and minimizing cost. An unbalanced board construction can completely blow away any cost savings gained by mixing materials.

One small caveat: All the materials discussed were engineered for multilayer construction, but most of them process differently than FR-4 in one or more ways. Some have minor differences, while others have process differences that are more extreme. It's highly recommended to anyone considering use of these, or any mixed structures, to contact your fabricator and make certain the materials chosen can be used within the same board without issue.

This article only touches on a few possibilities for mixing PCB dielectrics. Before writing this I contacted several of the high-frequency analog material suppliers to ask their thoughts. Both Andy Slade of Rogers Corp. and Ed Sandor of Taconic responded with their ideas. In addition to the items already discussed, Sandor mentioned a common set of materials that Taconic often blends for construction of RF antennas, at moderate cost. The various opportunities are almost endless.

However, as both Slade and Sandor cautioned (I'm paraphrasing here), "Almost any of our materials can be combined with FR-4 or with each other, but that doesn't always mean it's wise to do so." Some materials, for mechanical, thermal or structural reasons, simply can't be mixed while maintaining high reliability of the board. If materials are not compatible, the board could delaminate or via holes could be severely stressed.

To design a mixed dielectric board, start by viewing the broad spectrum of HS and HF materials available (see the Web references that follow), then chose the one or ones to blend that offer the expected result.

Before proceeding, immediately contact both the laminate supplier and your HS or HF board fabricator to make sure that what you want to do can be accomplished reliably. By contacting the supplier and the fabricator, they can usually offer advice on which alternatives are available to create the desired result, should the designer's choice not be practical. PCD&M

Rick Hartley is a senior design engineer and PCB specialist at L-3 Communication, Avionics Systems. He is a frequent speaker at the PCB Design Conferences. Hartley can be reached at This email address is being protected from spambots. You need JavaScript enabled to view it..