“JTAG | IJTAG Semiconductor and Board Test Security” is an eBook that addresses weaknesses in the IEEE 1149.1 Boundary-Scan (JTAG) standard’s test access port found on printed circuit boards and chips. Describes general security strategies based on the IEEE 1687 Internal JTAG (IJTAG) standard that can overcome these problems. Is available free.

Asset InterTech, http://www.asset-intertech.com/Products/Boundary-Scan-Test/BST-Software/JTAG-IJTAG-Semiconductor-and-Board-Test-Security

Antenna Magus v. 5.0  features  upgraded design capabilities for 250 antenna types. Automatically suggests practical design objectives and, as needed, instantly converts information provided by the designer between different representations. Features library of specifications, incorporating properties of typical design specifications used in various industries. Accepts user specification information for easy reuse. Chart tracing tool, which digitizes data from images of measurement or simulation plots, is integrated into the specification library, and includes automated extraction of representative properties such as beamwidth and sidelobe level. All elements of a design, such as parameter values and 3D images, can also be saved to file or clipboard in various text and image formats, providing easy access to resources for reporting. Integrates seamlessly into computational electromagnetic simulation tools (CST Studio Suite).

Magus, www.antennamagus.com

CST, www.cst.com

Integr8tor v8.3 sales and engineering server for auto input and design analysis is now available for download. Automatically downloads and analyzes incoming client design data; delivers quote-ready data to sales department, and design breakdowns with design-rule, DfM and capability checks to engineering and production departments. Offers a new tool that determines automatically whether holes should be drilled in sequential printed circuit boards using laser or mechanical means; analyzes characteristics such as hole size and type, and pad and ring size. Enables raft of additional layers to be analyzed automatically. Extra carbon layers, peel-off mask layers and legend layers can be analyzed automatically for characteristics such as minimum clearances and feature sizes. Analyzes solder mask layers for covered via holes. New features include expanded character sets for Asian users; bookmarks in the QED reports; improved edge connector recognition, and improved registration.

Ucamco, www.ucamco.com

Tachyon-100G laminates and prepregs enable line cards required to transmit 100GbE at data rates in excess of 25Gb/s per channel. Have identical electrical properties as Tachyon; Z-axis CTE is more than 30% lower than Tachyon. Suitable for fabricating high-layer count, 0.8mm pitch line cards with heavy 2oz. copper inner layers. Have performed reliably on TVs designed to define minimum pitch capabilities for Pb-free PCB assembly. Dk of 3.0 is stable between -55° and +125°C up to 40GHz and Df of 0.002. Materials use spread glass and reduced profile VLP-2 copper (with 2µm Rz surface roughness copper foil).

Isola Group, www.isola-group.com