SAN JOSE -- Cadence today announced five new OrCAD products and three key features aimed at increasing designers' productivity by reducing design cycle time and facilitating more advance designs via additional high-speed capabilities.
- OrCAD Component Information Portal provides users with CIS database management capabilities and integrated access to parametric component data through an interactive, web interface directly within the OrCAD Capture CIS product.
- OrCAD DFM Checker provides a comprehensive set of manufacturing/fabrication-centric checks for OrCAD PCB Editor. DfM fabrication checks can be run at any time during PCB place and route to help ensure that no fabrication-related issues are present, helping avoid fabrication-related delays, additional costs and re-work.
- OrCAD Panel Editor provides an intelligent panel documentation environment for OrCAD PCB Editor that significantly simplifies panel creation and documentation.
- OrCAD Sigrity ERC (Electrical Rules Check) provides a comprehensive set of electrical signal quality checks for OrCAD PCB Editor. ERCs are designed to be run by the PCB designer as a first-order electrical validation. This capability enables changes to be made within the design before more extensive and exhaustive analysis is performed.
- OrCAD Capture Constraint System enables a constraint-driven PCB design flow for OrCAD Capture and OrCAD PCB Editor. Compared to the existing methodology, the OrCAD Capture Constraint System substantially expands the constraint definition and management methodology in OrCAD Capture.
Cadence also announced three new technologies:
- OrCAD PCB Editor productivity improvements include Scribble Route, an auto/interactive routing feature, which allows the user to loosely sketch a path for a route as the system figures how to detail-route it, as well as group and contour routing updates and via arrays.
- OrCAD PCB Professional high-speed design features now offer enhanced differential pair constraints, propagation constraint support, delay tuning with heads-up display support, net scheduling and impedance constraint support.
- OrCAD Signal Explorer is being added to OrCAD Capture technology-based products, enabling front-end signal integrity/signal quality simulation as well as topology exploration and constraint definition. It can also be scaled for additional signal exploration and signal integrity capabilities through OrCAD PCB SI.
"As mainstream products such as Internet of Things devices and smart consumer electronics continue to evolve, they commonly include functionalities such as high-speed memory and sophisticated serial interfaces that create new challenges for the designer," said Josh Moore, director of product marketing for OrCAD, Custom IC & PCB Group, Cadence. "With our 30th anniversary release, designers now have access to solutions that are suitable for high-speed electronic products that have more complex design requirements. For example, the new OrCAD Capture Constraint System product significantly enhances the OrCAD design flow with new high-speed constraints and rules specific to high-speed memory and sophisticated serial interfaces, allowing engineers to far more effectively communicate and drive high-speed design intent, which helps to reduce design iterations."
