Log in / Register
  • ENEPIG Corrosion Mechanisms

    ENEPIG Corrosion Mechanisms

    Different types of nickel corrosion and potential mitigation strategies.
      READ MORE...

  • The Future is Thin, Flat and Flexible

    The Future is Thin, Flat and Flexible

    What’s ahead for antennas, heaters and inks.
      READ MORE...

  • Royalty Flush

    Royalty Flush

    A noted solutions architect offers an audacious plan for AI acceptance. It just might work.
      READ MORE...

  • Rocking and Rolling at ZIW

    Rocking and Rolling at ZIW

    The annual user event was tuned into AI, but that’s not the only melody being played.
      READ MORE...

  • Can Thailand Pad its PCB Gains?

    Can Thailand Pad its PCB Gains?

    2023 saw only a handful of fabricators gain ground, but SE Asia is primed to boom.
      READ MORE...

Homepage Slideshow
  • Home
  • Editorial
  • New Products
  • Agilent Releases High-Frequency SPICE Simulation Technology for Software

Agilent Releases High-Frequency SPICE Simulation Technology for Software

Published: 29 January 2007
SANTA CLARA, CA – Agilent Technologies Inc. has released high-frequency SPICE simulation technology as part of the Advanced Design System’s new Signal Integrity Designer Premier software suite.
 
The software is said to offer a complete set of front-to-back simulation and layout tools, and instrument links for RF and microwave IC design in a single, integrated design flow. Its signal integrity solution for high-speed digital design is reportedly made possible through its unique co-simulation technology. The software can model entire serial data links, including interconnects, pre-emphasis and adaptive equalization, in the presence of non-linear driver and receiver models.
 
Signal Integrity Designer Premier also provides two additional capabilities that are important for accurate high-speed digital design:
  • a new, fully integrated set of IBIS (I/O Buffer Information Specification) models for single-ended and differential components such as sources, buffers and terminations 
  • a broadband SPICE model generator

“Measured or modeled interconnects at data rates exceeding one Gbps are best represented in frequency domain, and it is very difficult for pure time-domain simulators to predict a correct response,” said Sanjeev Gupta, signal integrity application engineer with Agilent’s EEsof EDA division. “To address this challenging technical problem, we’ve developed a new convolution simulator that can automatically enforce passivity on S-parameter models, and can determine, very accurately, the causal time domain response, which represents the original S-parameter data.”

Submit to FacebookSubmit to Google PlusSubmit to TwitterSubmit to LinkedInPrint Article