To identify weak microvias with the potential for field failure, IST test temperatures need to be increased and cycling extended to failure.
PCB reliability can be measured using thermal cycle testing. Typically, thermal cycling ovens, HATS, IST or other thermal cycle test methods are used to establish relative reliability of the PCB. Using the criteria that an increase in resistance, usually 10%, on a given circuit is a failure, different types of interconnect structures may be tested by thermal cycling to failure. The cycles-to-failure data may be used to rank relative robustness of various interconnect structures. Most would rank the interconnections, in order starting with the weakest, as: buried vias; blind vias; plated through vias; and finally microvias, considered the most robust interconnect structure in a given application. This ranking of interconnect vulnerability may change for different applications, configurations and PCB constructions but is a useful guide for most applications.
Interconnect reliability is influenced by interconnect robustness factors including: copper thickness, distribution and quality, material robustness, design aspects such as hole and grid size, circuit density and aspect ratio. It is understood that any interconnect structure or influence may dominate a circuit board’s reliability by failing early. Usually, microvias are not the weakest interconnection in a well-fabricated, well designed, circuit board.
Inquiries about microvia reliability testing and modes of failure from PCB material suppliers, PCB fabricators, contract manufacturers and assemblers, OEMs and end users has risen over the past six months. At the higher assembly and rework temperatures associated with lead-free assembly, interconnects are degrading, and weaknesses in microvias are quickly being found.
Microvias are being fabricated in a number of configurations. Microvias may be open or filled with a dielectric, filled with a conductive hole fill material or filled with plated copper. Some microvias are capped and placed in pads, stacked on top of buried vias or isolated from other interconnect structures. The microvias are most often laser ablated, but they may also be drilled or formed by a dielectric etching process like plasma etching in flex circuit applications. Metalization of the microvia may be achieved by electroless copper or direct metalization.
Microvia formation must be done with an eye on other interconnect structures that are formed concurrently during fabrication. Processes like hole preparation, desmear, cleaning and microetch are happening concurrently in microvias, buried vias and plated through holes.
Influences in microvia integrity include microvia shape, cleaning, metalization, copper plating thickness and plating distribution. More subtle influences include the width of the top opening and base, the surface area of the base and the thickness of the dielectric layer through which the microvia passes, generally summed up as the aspect ratio. Aspect ratio is the dielectric thickness to hole size expressed as a ratio. Companies are successfully producing PCBs with aspect ratios of 48:1, so it is surprising to find that microvia aspect ratios greater than 1:1 are a challenge. The robustness of a microvia is the sum total of all these factors, designs and processes, working in cooperation or competition with each other in response to the stresses associated with the thermal excursions of assembly, rework, test or the end use environment.
Weak microvias present a reliability testing challenge. A weak microvia that fails in assembly, during burn-in or early in the end use environment, may appear robust when thermal cycle tested at 150° C for thousands of cycles. Not only may the weak microvia fail in assembly or in the end use environment, but it may also exhibit a degree of self-healing at ambient. A PCB with failing microvias often presents as an intermittent open. Closed at ambient and opened, or presenting high resistance at the operational temperature, makes finding degraded microvias in an assembled PCB a challenge.
In 2005, a study was conducted on coupons from a lot of boards with known marginal microvias. The boards, fabricated with a robust FR-4 dielectric, were producing a 30% failure rate in assembly, and the microvias were found to be the cause of failure. Some of the coupons associated with the failing lot of boards were surviving end of test at 1000 thermal excursions heating to 150° C. In an effort to improve the acuity of the thermal testing on the microvias, they were tested at 150° C, 170° C, 190° C, 210° C and 230° C. The study demonstrated that known weak microvias tested at 190° C failed before 500 cycles. Tested at 190° C, the failure mode of the microvia exhibited in microscopic examination was the same as found in the failing printed circuit boards. The result of the study was to adopt microvia reliability testing at 190° C.
In order to enunciate failures in coupons with weak microvias, thermal cycle test temperatures need to be significantly increased above 150° C, or cycles to failure need to be significantly extended to thousands of cycles. Since the 2005 microvia study, microvias evaluated with IST are tested at 190° C when fabricated on FR-4 material and tested at 210° C or 230° C when fabricated with polyimide materials. Testing at 190° C, 210° C or 230° C to 500 or 1000 cycles has demonstrated to be sufficient to fail weak microvias. This approach has proven adequate to find weak microvias, to produce timely data and to prevent false positive results. PCD&F
Paul Reid is program coordinator at PWB Interconnect Solutions Inc.; This email address is being protected from spambots. You need JavaScript enabled to view it..
