Xpedition Package Integrator flow performs integrated circuit, package, and printed circuit board co-design and optimization.

Package Integrator automates planning, assembly and optimization of today’s complex multi-die packages. Incorporates virtual die model concept for true IC-to-package co-optimization. Allows planning, assembling and optimizing of complex systems with minimal source data. Rules based on pin, bus and interface. Creates detailed, intelligent view of chip-package interactions. Includes interfaces and a range of software including Xpedition (for design), Flotherm (for thermal analysis), HyperLynx (for PCB analysis and verification), Valor NPI substrate fabrication checking, and Nimbic 3D full-wave EM simulation. EDA-neutral input and output. Can help reduce package substrate and PCB costs by efficient layer reduction, optimized interconnect paths, and streamlined/automated control of the design process. Features a formal flow for ball grid array (BGA) ball-map planning and optimization based on an “intelligent pin” concept, defined by user rules. User-defined GUI displays primitives and allowss definitions of signals, pins and I/Os. Multi-mode connectivity management system (incorporating HDL, spreadsheet and graphical schematic) provides cross-domain pin-mapping and system level cross-domain logical verification. 

Mentor Graphics, www.mentor.com

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