T2B software for transistor to behavioral model conversion is said to be accurate, fast, globally supported, and practical for on-chip and packaged I/O circuits. For analyzing combined signal and power integrity effects in high-speed designs such as those that include DDR parallel bus interfaces. Models retain transistor-level accuracy while enabling dramatically improved simulation efficiency. Enable accurate full bus simulations to be completed in hours or minutes, while similar simulations with transistor models often take days. Converts transistor level models to IBIS 5.0 power-aware models that retain accuracy of the original, enabling support of full bus simulation flow for quick design improvements. Automatically generates IBIS 3.2, 4.2, 5.0 and Sigrity accuracy-enhanced models from transistor level driver models. Improve accuracy when used with HSPICE and other transient simulators.

Sigrity, www.sigrity.com

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