SAN JOSE – Cadence Design Systems Inc. has introduced Cadence Incisive Design Team Xtreme III systems, the next generation of the Incisive Xtreme series of accelerator/emulators within the Incisive functional verification platform.
 
Xtreme III systems are said to simplify the movement to and from simulation and acceleration engines, integrate verification management and debug environments, and support advanced verification methodologies such as assertion-based and transaction-based acceleration. As the highest density (volume per gates) acceleration/emulation system, it offers twice the performance of Xtreme Server with 10-100,000 times the simulation performance gain, supporting up to 72M gates in a single chassis.
 
The simulation-like, event-driven environment of Xtreme III reportedly provides several verification process automation capabilities for design teams. These capabilities include integration with Incisive Design Team Manager for plan- and metric-driven closure management, integration with the Incisive SimVision simulation debug environment, and support of SystemVerilog Assertions and SystemVerilog Direct Programming Interface.
 
"The proliferation of system-on-chips and the explosion of verification complexity have resulted in a thirst for more performance at the designer's desktop," said Steve Glaser, corporate vice president of marketing, Verification Division, Cadence. "The Xtreme III series was developed specifically to deliver acceleration to a broad set of design engineers by making it easy for them to use the advanced verification methodologies required to reach predictable verification closure."
 

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