Printed Circuit Design & Fab Online Magazine - Features

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Design projects that are actually completed with time to spare are few. We do what we can, but breaking new ground invariably uncovers a few snakes in the brush, and dealing with them takes time. That means that the next step – production ramp – starts behind schedule. At that point you need to get assembly quotes back ASAP so a choice can be made and the trigger pulled to get product flowing.

A new study of nanocoatings allows users to visualize solder paste flow under the stencil.

Do nanocoatings really extend stencil underwipe intervals? As part of a larger stencil study we were performing for SMTAI,¹ we decided to include a quick test. We’d take two of our nanocoated fine grain stencils and run one print per wipe vs. 10 prints per wipe on a really complex test vehicle.

A coordinated design methodology fine-tunes chip-to-package PCB layout and routing.

When routing a ball grid array style package on a printed circuit board, have you ever wondered what the package designers were thinking when they came up with the pattern and pin assignments? Was there any consideration at all to the impact on the PCB? In most cases the answer is yes, but there was probably little the package designer could reasonably do to mitigate connectivity issues originating from the chip-level layout.

The biennial’s show attendance and scale remain stellar, but the attention was on the next generation of miniature packages.

At first blush, the biennial Productronica trade show in November looked eerily similar to the 2011 event. The attendance and number of exhibitors were similar in numbers to years’ past, and several exhibitors even opted for the same booth locations as in 2011.

New low-loss, optically stable materials can be manufactured using conventional PCB methods.

From cloud hosting to streaming mobile apps, the flow of data is exploding worldwide. According to Cisco’s most recent Global Visual Networking Index, global IP traffic will grow at a compound annual growth rate of 23% from 2012 to 2017. Indeed, annual global IP traffic will surpass the zettabyte threshold (1.4 zettabytes) by the end of 2017, reports Cisco. That is the gigabyte equivalent of all movies ever made crossing global IP networks every 3 minutes.

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Features

What Goes in the PCB RFQ Checklist?

Want a quick response to the PCB assembly RFQ? Submit the full package of details.

Reducing Stencil Wipe Frequency

A new study of nanocoatings allows users to visualize solder paste flow under the stencil.

Multi-Fabric Planning for Efficient PCB Design

A coordinated design methodology fine-tunes chip-to-package PCB layout and routing.

Big and Small in Munich

The biennial’s show attendance and scale remain stellar, but the attention was on the next generation of miniature packages.

Polymer Waveguide Silicones for High Bandwidth Applications

New low-loss, optically stable materials can be manufactured using conventional PCB methods.

What Goes in the PCB RFQ Checklist?

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