Thousands of attendees gathered at ECTC to explore the latest advances in advanced packaging, AI-driven design, heterogeneous integration and thermal management.
More than 2,700 attendees conversed about the latest developments in packaging and assembly at the IEEE Electronics Components and Technology Conference (ECTC) in May in Orlando.
Conference organizers dedicated the event to the memory of industry icon Dr. William (Bill) Chen, who was instrumental in the formation of the Heterogeneous Integration Roadmap and a visionary in the industry. During the keynote, Tien Wu, CEO of Advanced Semiconductor Engineering, highlighted Dr. Chen’s contributions and offered insights into advanced packaging trends and the future of system optimization.
Organizers devoted a full day to the Heterogeneous Integration Roadmap workshop, covering topics including additive electronics manufacturing for advanced packaging; metrology for advanced packaging, including challenges, innovations and industry impact; and emerging technologies such as neuromorphic computing.
Special sessions. Many of the overlapping special sessions on Tuesday focused on the role of artificial intelligence (AI). MIT Lincoln Laboratory and Nvidia chaired the special session “Quantum Infrastructure for AI Applications: Packaging Challenges and Roadmap,” one of the first public discussions to address packaging for quantum AI infrastructure. Panelists represented MIT Lincoln Laboratory, IBM, IonQ, Google Quantum, Microsoft Quantum and PsiQuantum.
Ecole Centrale de Lyon and the University of Illinois Urbana-Champaign chaired the session “AI-Enabled Electronic Design Automation for Multi-Physics Advanced Packaging,” with participants from EPFL, Arizona State University, Synopsys, Zhejiang University, Penn State University, Nvidia Research and TechSearch International.
CEA LETI and Corning led the session “Photonic-Based Systems for AI and Exascale Computing,” which examined the AI-driven push toward co-packaged optics, including photonic chiplet architectures and photonic interposers. Panelists from Lightmatter, Scintil Photonics, TSMC, Cisco Systems and Mixx Technologies discussed 3-D hybrid bonding, laser integration challenges and implementation in foundries and outsourced semiconductor assembly and test (OSATs).
Cisco and Qnity Electronics chaired the panel “System Integration Challenges of Large-Size and High-Power Components for High-Performance Computing and AI Applications.” The panel examined system-level design challenges for packages larger than 100mm × 100mm and power levels exceeding 1,000W in high-performance computing (HPC) and AI network systems. Panelists from Cisco, AMD, the University of Texas Arlington, Marvell and Nvidia discussed current challenges and potential solutions.
AT&S and Rapidus chaired the session “New Packaging Technologies Enabled by Panel Level Integration,” featuring panelists from the Georgia Institute of Technology, Qualcomm, Ajinomoto, Applied Materials, MKS Atotech, Yole and Broadpak. Discussions covered IC package substrate trends and developments in panel-level packaging (PLP). ASE, MKS and Volantis Semiconductor also explored PLP during the panel Enabling Next-Generation Advanced Packaging Technology from Wafer to Panel. Panelists from Resonac, ASE, Samsung Electro-Mechanics, AMD and LAM Research examined larger interposer and substrate requirements, embedded components, organic interposers and glass core substrates.
Sandisk and UCLA chaired the panel “Electrical-Thermal-Mechanical Co-Design in High-Performance Packaging,” where panelists from Samsung Electro-Mechanics, AMD, ASE, Synopsys and MediaTek emphasized the need for co-design methodologies that integrate thermal, mechanical and electrical considerations as packaging complexity grows to support AI, HPC and heterogeneous integration.
Yield Engineering Systems and EV Group chaired the panel “Innovative Materials for Advanced Packaging.” Resonac, Ajinomoto, Brewer Science and IMEC discussed polyimide and EMC materials, build-up materials, hybrid bonding dielectrics, adhesion and stress buffer layers and interconnect materials.
Rapidus organized an evening panel “Redefining System Integration: The Rise of Organic Substrates in the Chiplet Era.” Panelists from Shinko Electric, Unimicron, ASE, Intel and Synopsys discussed substrate options, including embedded bridge technology, trends in build-up substrates and developments in glass core substrates.
Thursday’s plenary session “Efficiency is Not Enough: Are We Solving the Wrong Problem in Data Center Energy Use?” featured panelists from AMD, Google, Microsoft Research, Accelsius, Marvell and IBM. The discussion focused on improvements in system architectures, including power delivery and thermal solutions. Panelists also explored customized chip-to-data-center power management; hardware and software infrastructure innovations; liquid cooling; codesign of optics, packaging, power delivery, memory and networking as a unified system; and use of simulations to evaluate software and hardware solutions, tradeoffs and optimization.
Binghamton University, Amkor and Auburn University organized Friday’s plenary discussion “Data Centers in the Age of AI: Challenges and Solutions,” featuring panelists from IBM, Nvidia, Cisco and Binghamton University. The panel examined the growing data center energy crisis, cooling technologies, the need for hardware-software co-design and the potential of co-packaged optics.
Startup competitions. ECTC featured two startup competitions. The ECTC Student Innovation Challenges Competition recognized finalists in two categories: BS/MS science and Ph.D.
A team from Georgia Tech won the undergraduate/master’s category with its research, “Low-Cost Robust Thermal Solution for High Power AI/Datacenter Processors.” Nanyang Technological University in Singapore won the PhD category with its research, “Tetrahedral Amorphous Carbon as a Cu Diffusion Barrier in Through Silicon Vias Deposited by Filtered Cathodic Vacuum Arc.”
Rapidus and Broadpak also organized a startup session focused on photonics companies.
Developments in RDL, Glass Substrates and CPO
Many presentations focused on high-performance packaging using molded redistribution layer (RDL) packages in both wafer and panel formats. Several speakers also provided updates on the status of glass core substrates, although few presentations included board-level reliability data from commercial products. Dai Nippon Printing (DNP) presented research on the use of a stress buffer layer to suppress SEWARE (glass cracking), reporting positive results following thermal shock and highly accelerated stress testing of a daisy-chain structure with 100 vias. Researchers and companies also highlighted improvements in through-glass via (TGV) fabrication and glass processing, including advances in TGV liner materials from Georgia Tech, SUNY Binghamton and Simmtech. AnyCasting of South Korea presented a metallization method that achieves zero voids in TGVs.
Nearly 30 presentations focused on co-packaged optics (CPO). SPIL discussed challenges related to optical engine integration. IME A*Star presented its PIC-in-mold interposer demonstration, while Sumitomo Bakelite described work on an RDL interposer for a waveguide. AIST and Kyocera demonstrated an embedded silicon photonic transceiver in an optical RDL. Corning, DNP and LPKF examined the role of glass in CPO, and Marvell highlighted CPO developments for networking applications.
Hybrid bonding and alternatives. More than 100 papers explored hybrid bonding and alternative technologies. CEA Leti presented research on ultra-low-temperature annealing, while cleaners demonstrated die-to-wafer (D2W) bonding down to a 1µm pitch for multi-die stacking integration. Researchers at IME A*Star examined the advantages and challenges of hybrid bonding for HBM. IBM introduced a dielectric integration approach to improve die thinning and intergap filling, and ASML reported its collaboration with IMEC to enable scalable D2W assembly.
Sony provided updates on its face-to-back die-to-wafer hybrid bonding work and also presented a wafer-to-wafer (W2W) process achieving 0.4µm pitch bonding. Applied Materials showcased 450nm pitch W2W bonding developed at its EPIC Center and presented joint work with EV group (EVG) that achieved 300nm pitch W2W bonding. IMEC discussed W2W bonding with a 200nm interconnect pitch using silicon carbon nitride (SiCN) to create a flat surface, while TEL presented research demonstrating 140nm pad pitch W2W bonding. Adia introduced a potential repair option performed before the annealing step.
Researchers also highlighted alternatives to hybrid bonding, including UCLA’s Cu-to-Cu thermocompression bonding (TCB) and UC San Diego’s TCB process with molded underfill. Several papers examined polymer processes that reduce particle contamination. ASE discussed low-temperature Cu/polymer hybrid bonding, and Rapidus presented a solder-polymer interconnect option featuring 25µm pitch microbumps.
Thermal discussions. IEEE’s Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm) took place alongside ECTC. Conference tracks covered component- and system-level thermal management, mechanics, reliability, data center thermal technologies and emerging applications.
Approximately 25 iTherm presentations focused on data center energy use, noting that rack densities exceeding 200kW with 800V power distribution will require single- and multi-phase liquid cooling as well as integrated power conditioning. Speakers addressed thermal management from the die level through complete systems, data centers and grid infrastructure. Technical presentations covered microfluidic channels in glass substrates, real-time data and machine learning for data center cooling models, high-performance heat sinks and cold plates and heat capture and reuse. Additional presentations examined predictive analytics, machine learning and metrology. One presentation explored diamond heat spreaders grown on HEMT devices to improve thermal dissipation and reduce hotspots, while a professional development course provided an update on diamond research and applications.
ECTC returns to Colorado in 2026, and iTherm will once again be co-located.
E. Jan Vardaman is president of TechSearch International (techsearchinc.com) and a contributing editor for PCD&F/CIRCUITS ASSEMBLY; This email address is being protected from spambots. You need JavaScript enabled to view it..
