Segmenting the stencil layer improves solder coverage.
Quad-flat-no-lead (QFN) components (also known as MLF or micro lead-frame) used to cause a lot of problems a few years ago, if the number of blog posts covering the subject is evidence.1
Can I use my own blog as cited evidence to justify my own conclusion? It probably is bad form, but I’m doing it anyway. Interestingly, if you look up “citations” in Wikipedia, the entry (as of this writing) has a note indicating that the article on citations has insufficient online citations. Hmmm.
Anyway, it seems the industry is catching up with the proper manufacturing methodology for use of the technology. It’s important enough, though, that it bears repeating. The key to successful QFN and DFN manufacturing is in the solder paste stencil pattern. Consult the datasheet for the part, but if you can’t find the datasheet, or if it doesn’t cover the stencil layer, use the window pane technique, or “segmenting”, for the stencil layer when making the library part for the CAD software.
If the full thermal pad area is left fully open, the likely result will be too much solder in that area. The part will ride higher than it should and may very well float too high for all of the pads on the side to connect. (See the top drawing in Figure 1.)
Instead, shoot for 50% to 75% paste coverage by segmenting the stencil (Figure 2). That’ll ensure the center pad and the side signal lands will be at the same level. It will pay off in much better yields and reliability.
Ed.: Read Duane’s blog each week at http://www.circuitsassembly.com/blog/.
1. Duane Benson, Funky QFN Land Patterns, Sept. 24, 2010, blog.screamingcircuits.com/qfn-and-dfn/.