Plated through-hole reliability is influenced by high-density interconnect (HDI) designs and lead-free and mixed-technology (leaded and lead-free solder assembly). HDI adds several new structures to the PTH family, including microvias and buried vias. Microvias can connect to one, two or three layers, can be stacked or unstacked, and filled or unfilled. The subcomposite structures can come with one, two or three subs per composite, often with mixed laminate materials. There are buried vias of various sizes, and these also come in many different forms: blind, core, or sub; filled or unfilled; capped or non-capped.
HDI vias bring with them at least two new failure mechanisms that are reflow-induced and very difficult to screen: base or pad separation of the microvias,1 and eyebrow cracking of the laminate, which occurs near buried vias. Not only are there more failure mechanisms to monitor than ever, but they also compete. As an example, determining if PTH or laminate mechanisms dominate in a failure is a strong function specific to individual HDI designs. Surviving lead-free and mixed assembly reflow significantly magnifies aforementioned failure mechanisms, giving new life to former mechanisms and introducing a unique PTH-driven internal delamination mechanism2,3 referred to as “invisible” delamination.
The PTH test used at Endicott Interconnect Technologies (EI) for the past 18 years is the current induced thermal cycling (CITC) test. It is a version of other known current induced thermal cycling.4-9 The tester uses proportional control algorithms to continuously adjust the current for each coupon in each cycle, to achieve a precise and repeatable temperature cycle with a prescribed linear ramp and dwell time. The typical ramp rate, as used for all the data in this article, is 3°/sec. The high-temperature dwell time is typically between 30 sec. to 40 sec., which has been shown by modeling and measurements to be sufficient to achieve thermal equilibrium.8 Fans are then turned on to start the cooling phase. FIGURE 1 illustrates the cycle and also outlines the three main uses for the test, including PTH life curves, rapid product monitoring or evaluations, and real-time video recording of PTH failure mechanisms during a coupon heat cycle.
The place to start a discussion of PTH and laminate problems is with a review of the standard through via, including barrel life as a function of temperature. FIGURE 2 depicts select recent and vintage life curves to review the problem that contributed to all other problems, that of CTE mismatch between copper barrel and the surrounding laminate at reflow temperatures. The CTE mismatch can produce deformation of such magnitude that even well-plated vias can survive only a few assembly passes without cracking.
Note the other material curves in Figure 2. The purple curve shows why polyimide, though expensive and a challenge to process at high aspect ratios, is a popular choice with the military for assembly robustness. The green curve is a high performance, low loss, polyphenylene oxide-filled resin that consistently passes all lead-free testing and has the best overall PTH performance of any laminate tested. (It is not a universal solution because its price/performance likely exceeds most applications.) Note that the blue curve is a cost-effective, high-Tg phenolic epoxy with excellent PTH life in all regions including 220ºC assembly (40 cycles), but at a lead-free assembly temperature of 260ºC, it lasts only 10 cycles.
While Figure 2 shows the reason for assembly-driven via failures, FIGURE 3 illustrates why they can be a serious reliability concern as latent opens in the field. At reflow temperatures above the Tg of the laminate material, the z-axis expansion of the laminate is an order of magnitude greater than that of the copper, which forces the copper in tension where it plastically deforms (for example, the copper barrel becomes permanently longer than it was). Similarly, the laminate sees significant compressive forces in the zone around the PTH barrel because the barrel acts as a rivet to constrain it from expanding, as it would away from the PTH. These considerable compressive forces create a pressure gradient that causes the laminate, now well above Tg, to “flow” away from the barrels. Ironically, cross-linked thermoset polymers are not supposed to flow as other polymers, but some form of movement or reshaping is indicated by the permanent deformation seen in laminate x-sections after reflow or solder shock – the laminate is now longer between vias than in the zone directly next to them (Figure 3c).
The combination of these permanent deformations (longer barrel, shorter laminate) means that any crack formed at the peak temperature will be forced in slight compression on return to room temperature. In addition to the illustration, Figure 3 includes ESEM photos of a barrel crack open at 230ºC and the same crack closed tightly again after cooling to ambient. It also illustrates electrical measurements of eight coupons (left axis) with intentionally very weak barrels through a single simulated reflow cycle in a convection oven. They are shown completely open during heating (temperature, red line and right axis) between T = 140º to 185ºC, and solidly closed to original resistance value starting between T =1 75º to 110ºC.
FIGURE 4a plots the hot resistance by coupon and reflow cycle. A 3% failure criterion was used in this case, instead of 5% or 10%, because of the difficulty of reading all the coupons simultaneously while still hot, and it appears to best fit the sharp slope change of the data. The final results are plotted in FIGURE 4b. The curve for cycles to fail from actual 220ºC reflow passes is almost identical to the 220ºC CITC cycles to fail curve.
As if the lead-free situation were not complex enough, the magnitude of deformations at lead-free temperatures are so significant that they often trigger different and competing failure mechanisms along the life curve. While this fact does not invalidate the curves, it could have design implications, and it certainly sheds light on the lead-free challenge. For example, FIGURE 7 is a life curve for a high-Tg epoxy constructed with two different and independent CITC coupons – one with the daisy chain stitch external (top and bottom surfaces) and one with the stitch on the nearest two internal planes, top and bottom. The two coupon types yield exactly the same cycles to failure at 150º and 175ºC, and the same failure mode (center barrel crack). But they diverge slightly at higher temperatures – the external coupon with lower life in this case, fails at the external rim, while the internal coupon lasts a little longer but fails at the inner plane connection, at least at 260ºC.
As a second example, FIGURE 6 compiles results of the same experiment for a high Tg-filled resin. The same three failure mechanisms compete again, this time with the inner plane failing slightly earlier than the rim at 260ºC, but both different at the center barrel crack than at conventional reflow temperatures. Note that none of the curves differs significantly, and a repeat of either test could yield a different result by material, depending on a number of factors, but these examples are otherwise provided as one more case for the complexity of ensuring laminate boards for lead-free assembly.
‘Invisible’ Delamination
Thermally induced internal delamination is one of the original and ever-present failure mechanisms for laminate substrates. The root cause is generally linked to the explosive vaporization of entrapped moisture at high temperatures, especially during reflow. The alternate names (blistering, popcorning) not only reflect the mechanism but also hint at another fortunate attribute – when they occur within laminates of any thickness, they create a measureable opening within the substratealmost always visible at the surface as a raised or discolored area.
However, as lead-free evaluations continued, users and suppliers began to discover another form of delamination with clear distinctions from this classic, visible form. The new type appears only between vias, not open areas; occurs within resin, not at glass interfaces; and is highly dependent on the aspect ratio and grid of those vias. That is, there is no visible difference between a board module site that has this delamination versus one that does not. While most believe that both mechanisms are due to expansion/vaporization of trapped moisture with temperature, the unique nature of “invisible delamination” is so striking as to demand a greater understanding. Figure 7 shows a unique photo of delamination found by x-ray that vividly answers why this mechanism is invisible – despite the large rupture between the two vias, there is otherwise little or no change to the surrounding material, planes or dimensions. But this answer only raises new questions – how does the material within the rupture disappear, seeming to violate “conservation of mass,” and how does this happen with little effect to surrounding laminate?
Whatever the root cause, the important question is, How does one control this unique lead-free failure mechanism given that the severity is a function of material selection, peak reflow temperature, board thickness, hole size, hole grid, process history including moisture content, and board design/construction? Clearly, such a multidimensional problem demands an evaluation approach that is also multidimensional. That is, classifying a material as lead-free compatible based on a single coupon at 5 x 260ºC reflow test is no longer a viable method.
The real surprise and complexity of HDI is not only how many different via structures and combinations it adds to the design mix today, but also how strongly dependent the link is between specific designs and reliability. In BGA technology of the 1980s and ’90s, two different products may have had a different number of wiring vias on a different thickness board, but the failure modes and overall reliability were quite predictable, even if challenging at high aspect ratios. And once a design space was qualified, specific products did not have to be requalified to know they would work. But the large number of via types and constructions available, often with mixed materials within the composite, lead to a unprecedented complexity, especially when combined with the narrow margins of lead-free assembly. The key to quality and reliability assurance is to know the weakest link for any specific product, but for HDI designs, that is often difficult to predict: Will it be the microvias, through vias, or a laminate failure mode induced by the vias?
Fortunately, there are some rules of thumb that apply to this design versus reliability question.
Conclusions
If the past few decades have seen such an increase in complexity and failure mechanisms, both laminate and copper related, what will be the expectation for future technology? All via structures of future technology will be smaller and less through-via-like. Interestingly, for all the failure mechanisms reviewed, smaller is better! For example, FIGURE 8 shows an example of a leading-edge board constructed with z-interconnect, which in some cases is the only available means to meet electrical (no via stubs) or wiring requirements . While the z-interconnect itself is a challenge, the product shown so far appears to be resistant to the mechanisms discussed. There are no through vias, and the through-via-like nature of what is small and not dense enough to escape both invisible delamination and eyebrow cracks, at least with the materials and parameters evaluated so far.
The comfortable qualification margins of past products may longer be possible with today’s HDI designs and lead-free reflow. Reflow and via life requirements may need to be tailored for a specific product with the smart and innovative use of coupon tests. Design for reliability today involves balances the potential risks of via failure versus laminate failure based on material choice, via size and grid, and the mix of through vias versus compliant HDI structures.
Kevin Knadle is a senior advisory reliability engineer with Endicott Interconnect Technologies Inc.; This email address is being protected from spambots. You need JavaScript enabled to view it..
Acknowledgments
The author acknowledges the contributions of colleagues including Ron Lewis, Bob Japp, Bob Harendza, John Lauffer, Bill Rudik, Voya Markovich, Roy Magnuson, Anish Bramhandkar, Jim Stack (EI); Wayne Rothschild (IBM); Binghamton University IEEC.
References
1. Andrews, P., Parry, G., Reid, P., “Learning from Microvia Failure in Lead-Free Assembly,” Printed Circuit Design and Manufacture, June and July 2006.
2. Rothschild,W., Kuczynski, J., “Lessons Learned about Laminates during Migration to Lead-Free Soldering,” Apex, March 2007.
3. Ehrler, S., “The Compatibility of Epoxy-based Printed Circuit Boards with Lead-free Assembly,” Circuitree, June 2005.
4. Knadle, K.T, Ferrill, M.G., “Failure of Thick Board Plated Through Vias with Multiple Assembly Cycles—The Hidden BGA Reliability Threat”, SMTA Journal of Surface Mount Technology, vol. 10, no. 4, October 1997.
5. Knadle, K, “Proof is in the PTH – The Critical Link between PTH Processes and PCB Reliability,” Endicott Interconnect Technical Symposia, July - October 2003.
6. Knadle, K.T., Jadhav, V.R., “Proof is in the PTH – Assuring Via Reliability from Chip Carriers to Thick Printed Wiring Boards, ECTC Conference, 2005.
7. Knadle, K.T. “Analysis of Transient Thermal Strains in a Plated Through Hole using Current Induced Heating and Transient Moire Interferometry,” master’s thesis, Binghamton University, 1995.
8. Ramakrishna, K., Sammakia, B., “Analysis of Strains in Plated Through Holes During Current Induced Thermal Cycling of a Printed Wiring Board”, 7th Symposium on Mechanisms of Surface Mount Assemblies, 1995.
9. IPC-TM-650, Method 2.6.26, “DC Current Induced Thermal Cycling Test.”