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Printed Circuit Design & Fab Magazine

SAN JOSE, CA – The Silicon Valley Chapter of the IPC Designers Council is meeting at TTM here Oct. 13 to discuss printed circuit board cost adders.

Julie Ellis, field applications engineer, TTM Technologies, will discuss factors that drive PCB cost. Ellis will discuss basic design guidelines for standard production and how they affect the number of required processes and, therefore, cost.

She will also discuss costs related to material utilization, fixed premiums for smaller lines/spaces and tolerances, and variable costs of high-speed materials, drilling, and multiple lamination cycles.

Last, Ellis will show increasingly complex stack-ups to demonstrate how cost factors relate to the additional processes.

Attendees will learn the correlation between requirements and costs to help make better design choices.

To register, visit http://www.eventbrite.com/e/october-meeting-silicon-valley-chapter-ipc-designers-council-tickets-27791257399.