SAN JOSE -- Cadence today announced the acquisition of Taray Inc., a privately held developer of FPGA tools.

Terms were not disclosed. Cadence declined to say whether the deal would be immediately accretive to earnings.

The two EDA software companies have had a business relationship since early 2009, when Cadence began marketing the Taray-developed Cadence OrCAD and Allegro FPGA System Planner, a scalable co-design tool for designing FPGAs onto PCBs.  

Cupertino, CA based Taray was founded in 2002 by Nagesh Gupta, a former Hewlett-Packard engineer. The company's vice president of EDA, Ravi Vedula, also is a former Cadence employee.

The deal includes all 17 of Taray's staff and its intellectual property, including two patents. No changes are expected to the company's channel partners.

According to product management group director with Cadence PCB and IC Packaging Keith Felton, Cadence's OEM agreement with Taray has been a "tremendous success." Coupled with higher demand for that business, "we felt we had to secure our position to acquire them," he told PCD&F.

According to Felton, Gupta and Vedula will remain with the company, taking key roles in expanding the company's FPGA technology.

Because of its previous OEM agreement, much of the integration work was undertaken last year, said Hemant Shah, product management director with Cadence PCB and IC Packaging. "We have a roadmap and have plans to embed this technology even further inside the front and back space. This bridges the gap between the schematic world, the FPGA world and the PCB world. This gives the designer knowledge of those three domains, so when you do pin assignments, it does so with knowledge of those three domains."

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