Siemens’ Innovator3D IC provides a consolidated cockpit for constructing a digital twin, featuring a unified data model for design planning, prototyping and predictive analysis of the complete semiconductor package assembly.

Unifies power, signal, thermal, and mechanical stress analysis tool to enable "what-if" exploration while identifying, avoiding and solving challenges prior to detailed design implementation. Is integrated with the Siemens Xcelerator portfolio, but has open architecture that supports integration with third-party point solutions, and supports industry standard formats such as 3Dblox, LEF/DEF, Oasis and interface IP protocols (such as UCIe and BoW). Is capable of planning and prototyping all leading and emerging semiconductor integration methodologies and platforms including interposers (organic, silicon or glass), ABF build-up, RDL based with chips first or last including support for Deca Technologies adaptive patterning process. Is also certified for Panel-Level-Packaging (PLP), embedded or raised silicon bridges as well as System-In-Package (SiP) and modules.

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