XJTAG DFT Assistant free software interface for Mentor Xpedition Designer increases design for test and debug capabilities of the schematic capture and PCB design environment.
Helps validate correct JTAG chain connectivity, through full integration with the Xpedition schematic capture environment. Checks if JTAG chains are correctly connected and terminated at the schematic capture stage, before PCB is produced. Consists of XJTAG Chain Checker and XJTAG Access Viewer. XJTAG Chain Checker identifies common errors in a JTAG scan chain, such as incorrectly connected Test Access Ports (TAPs). A single connection error would inhibit an entire scan chain from working. XJTAG Chain Checker identifies connection errors and reports them to the developer during the design process. Incorrectly terminated TAPs are also identified. Access Viewer overlays extent of boundary scan access onto the schematic diagram, showing which components are accessible using boundary scan, and where test coverage could be further extended. Highlighting nets individually shows read, write, power/ground and the nets that don’t have any JTAG access on the schematic. Exports preliminary XJTAG project from the Xpedition schematic capture environment to the XJTAG development software, where additional tests can be developed. Free for Xpedition users of VX.2.1 or higher.
XJTAG