Cadence Allegro DesignTrueDFM technology performs real-time, in-design design-for-manufacturing (DfM) checks integrated with electrical, physical and spacing design rule checks (DRCs).

Is integrated in Allegro PCB Editor, enabling identification and correction of errors immediately. Is said to reduce rework, shorten design cycles and accelerate new product development and introduction, potentially saving at least one day per iteration and days to weeks overall. Provides continuous in-design feedback while designing. Provides a wide set of checks to ensure design manufacturability. Spacing between copper features such as traces, pins, vias relative to the board outline and other copper features can be verified in real time, independent of electrical and net-based rules. Makes it easy to configure, apply contextually and reuse manufacturing rules. Supports import and export of DfM rules and addresses more than 2,000 advanced checks. Employs new, more user-friendly DRC browser capable of addressing one class of errors at a time. Constraints are highly configurable with the ability to enable and disable groups and whole categories of rules, or individual rules. Rules can be applied in etch mode, non-etch mode, and in stack-up mode, giving designers the ability to isolate layers, geometries and cutouts. New browser also features an integrated DRC description with graphics, characterizes DRCs by type and provides a DRC count chart. Users can quickly sort, browse and review, as well as waive and unwaive DRCs.

Cadence Design Systems

cadence.com/go/designtruedfm

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