PCB engineers need more flexibility than all-or-nothing keepout rules.
Modern PCB layouts demand precise routing control. As board designs become denser and constraints become more difficult to manage, PCB engineers need more flexibility than all-or-nothing keepout rules.
The Track Keepout feature in CR-8000 Design Force enables PCB designers to selectively permit traces or copper fills within designated keepout areas. This gives layout engineers more granular control over routing behavior while helping reduce DRC issues, routing inefficiencies, and unwanted electrical connections.
Why Use Keepout Areas?
Keepout areas are protected regions on a PCB that restrict where conductive elements can be placed. PCB designers use them to prevent traces or copper fills from causing electrical, manufacturing, or reliability issues.
A PCB designer may define certain keepout zones to:
- Prevent traces from routing beneath high-speed devices where additional signals could introduce electrical noise or interference.
- Maintain required spacing around high-voltage circuitry to meet safety and clearance requirements.
- Block routing and copper placement near component bodies to avoid assembly or soldering problems.
As layouts become denser and more complex, keepout areas help designers maintain control over routing and copper distribution throughout the board.
Why PCB Designers Need More Granular Keepout Control
Traditional keepout rules are often defined as all-or-nothing restrictions, blocking both routing and copper placement within a region. Many PCB layouts require more selective control so designers can restrict one type of conductive element while still permitting another, however (Figure 1).
Figure 1. This keepout area (purple) permits traces, but not copper fills.
- Permit traces and vias, prevent copper fills: A designer may need traces and vias to pass through a constrained region near a component, while blocking copper fills that could create unintended electrical connections or spacing violations.
- Permit copper fills, prevent traces: A designer may want a ground copper fill beneath a sensitive device for shielding or thermal performance, while preventing traces from routing through the same area to reduce electrical noise or interference.
Without this level of control, engineers may create overly restrictive rules that complicate routing. In other cases, designers may override DRC warnings to achieve the desired layout, increasing the risk of costly errors and rework later in the design process.
How to Use the Track Keepout Feature
The Track Keepout feature works by combining designated keepout layers with configurable keepout rules. In CR-8000 Design Force, PCB designers define the keepout area and specify whether lines or area fills are permitted within that region (Figure 2).
Figure 2. Define track keepout settings to permit either lines (traces) or area fill (copper fill).
The feature uses these three steps:
- Create an “Inhibit track only” layer.
- Define the keepout area geometry.
- Set whether lines or area fills are permitted.
With proper setup, traces and fills are automatically restricted in appropriate keepout zones.
Keepout areas are often associated with components. If the keepout is input on the board but not the component, the component pins trigger DRC errors (Figure 3). To reduce false DRC warnings, define the keepout area within the component footprint or use the “Make Figure into Component” feature in Design Force so the DRC engine correctly interprets the designer’s intent.
Figure 3. The IC on the left is associated with its keepout area, while the IC on the right is not, resulting in numerous DRC warnings.
Who Benefits from the Track Keepout feature?
- PCB layout engineers: Improve routing flexibility while maintaining precise control over copper placement and spacing restrictions.
- Signal integrity engineers: Reduce electrical noise and interference by controlling where traces and copper fills are permitted.
- Library and CAD engineers: Create more accurate component footprint definitions and reduce false DRC warnings during layout.
This video shows how Track Keepout Control works ↗️
Takashi Ichikawa is an applications engineer at Zuken (zuken.com), focusing on customer support for CR-5000/CR-8000 and Cabling Designer. PCD&F/CIRCUITS ASSEMBLY shares this column each month as a benefit to its corporate customers and to provide real-world help to its members.
