Increasing conductor roughness alone increases the effective Dk in thin circuitry by up to 15% while substantially increasing dispersion. 

In 1949, S. P. Morgan1 published a paper numerically modeling the effect of regular triangular and square patterned grooves in a conductor surface on the conductor loss at different frequencies. As the skin depth of the signal approaches the height of the grooves, the conductor loss increases. With grooves with an aspect ratio of about 1:1, the maximum increase of a rough conductor is a factor of two for a signal traveling perpendicular to the grooves and considerably smaller for a signal traveling parallel. A simple explanation of the mechanism is that the small skin depth signal must travel along the surface of the rough conductor, effectively increasing the path length and conductor resistance.

The Morgan correlation was adapted into an automated microstrip insertion loss and impedance calculation described by Hammerstad and Jensen2 (H&J). The correlation is incorporated as a multiplicative correction factor KSR to the attenuation constant calculated for a smooth conductor.

where acond, smooth is the attenuation constant calculated for a smooth conductor and


where RRMS is the RMS value of the conductor roughness and δ is the skin depth.

It should be noted that both acond, smooth and KSR are functions of frequency. When the ratio of RRMS/d is small, as with a smooth conductor or at low frequencies where the skin depth is large, the value of KSR is close to one. As the ratio becomes large with higher profile conductors and higher frequencies, the value of KSR approaches two. This correlation predicts a “saturation effect;” i.e., that the maximum effect of the conductor roughness would be to double the conductor loss. This result also implies that the conductor loss for a lower profile foil will eventually approach that of a rough foil as frequency increases.

Groisse et al3 describe a similar factor Cs for correcting conductor loss for the surface roughness and skin depth

using the same symbols as in Eq. 2. Similar to Eq. 2, the conductor roughness attenuation factor “saturates” and reaches a maximum value of 2.

The calculated Morgan (solid lines) and Groisse (dotted lines) conductor profile correction factors are compared graphically versus frequency for values of the RMS surface profile from 0.2 to 3 µm (Figure 1). They exhibit good agreement at lower frequencies, but deviate as frequency increases. The Morgan correlation predicts a higher conductor loss where the deviations occur. Both correlations will saturate at a value of 2, but the Morgan factor reaches the maximum value at a lower frequency.

Historically, the Morgan correlation has agreed reasonably well with measured values for typical microwave circuit substrates that are generally thicker than those currently used in digital applications and at moderate frequencies. Figure 2 is a plot of “differential insertion loss data” from 1 to 10 GHz for a 0.020˝ thick 2.2 DK type GR PTFE-random glass laminate with 50Ω transmission lines clad with copper foils with profiles ranging from 0.4 µm RMS to 3.0 µm RMS. These are compared with the values calculated using the method of Hammerstad and Jensen for smooth foil and the “maximally rough” increase of a factor of two in conductor loss. The data show good agreement with the calculated values bracketing the measured data.

It is textbook4 knowledge that the loss of a medium contributes to the phase constant, as well as the attenuation constant, in the exact solution. The values for a homogeneous medium are given by





where a is the attenuation constant; b is the phase constant; w is the angular frequency; e is the permittivity; µ is the permeability, and s is the conductivity of the medium. While Eq. 4 and 5 apply only to a homogeneous medium, the general concept that loss (as represented by s) will influence the phase constant applies to practical circuitry as well.

It should also be noted that in many of the simpler circuit models and simulators, the phase constant in a “good dielectric” is approximated by

In the present work, we show data that demonstrate significant deviations from the behavior described by these correlations caused by the conductor profile. In particular:

  • Conductor roughness can cause more than a factor of 2 increase in conductor loss.
  • “Saturation” does not occur, at least up to 50 GHz; i.e., a lower profile foil will exhibit lower conductor loss than a higher profile foil, even at higher frequencies.
  • An unexpected influence of conductor profile on the phase constant is particularly evident in thinner laminates. The effect is larger than predicted simply by including the loss, and appears to be directly related to the profile itself.

Several recent papers have examined the effect of conductor roughness on the insertion loss of PCB-based transmission lines.5-9 Brist et al5 and Liang et al6 used the Morgan correlation (Eq. 2) to achieve a causal model of laminate performance that agreed well with measured data up to 20 GHz. Hinaga et al7 used a similar correlation to obtain more accurate dielectric loss values. Chen8 used numerical EM modeling of a rough conductor with electroless nickel-immersion gold plating and achieved good agreement with measured data. Tsang et al9 have performed numerical and analytical simulations that show that for multiscale rough surfaces (in contrast to the periodic surfaces treated by Morgan), saturation does not occur, and increases of greater than a factor of two in conductor loss can occur.

The present authors found only two recent papers directly addressing the effects of conductor profile on the phase constant. Ding et al10 have conducted modeling of wave propagation in a randomly rough parallel plate waveguide. They state, “The phase angle of the coherent wave shows that the rough waveguide exhibits more phase shift than a smooth waveguide corresponding to an increase in phase constant,” though the magnitude of the effect is not quantified.

Deutsch et al11 measured the relative dielectric constant (eR) of 0.0025˝- and 0.010˝-thick samples of FR-4 clad with rough and smooth copper foil using the “full sheet resonance” test method.12 The calculated eR of the thin substrate clad with the rough foil was approximately 15% higher than that of the same thickness substrate with smooth foil. The increase in calculated εR of the thin substrate clad with the smooth foil was considerably lower. Modeling with both a 3D, full-wave electromagnetic field solver and a 2D code that included the detailed profile of the conductors confirmed the approximate magnitude of the measured results. The authors attribute the increase in calculated eR to the increase in inductance caused by the conductor profile. Both the models and measured data also show an increase in dispersion (frequency dependence of eR) also caused by the effect of conductor profile on inductance.

Samples and Experimental Methods

Microstrip laminate samples. Fifty-ohm microstrip transmission lines were photo-lithographically etched onto Rogers ULTRALAM 3850 copper foil clad LCP (liquid crystal polymer) laminates of thicknesses of 0.004˝ to 0.020˝. The novel laminate is a glass fabric-free, pure resin circuit substrate that relies on the inherently low CTE of the oriented LCP film to achieve a good in-plane CTE match to the copper foil. Since the novel substrate consists of a single pure substance, the variation in the dielectric properties is inherently low, and there is no question of “glass to resin ratio” affecting the dielectric properties.

The samples were made in thickness increments of 0.004˝ from 0.004˝  to 0.020˝  by plying up 0.004˝  sheets and laminating them in an oil-heated flat bed press.

The 50Ω line widths were calculated using the method of Hammerstad and Jensen that is incorporated into Rogers’ novel impedance calculator program, MWI. The MWI program incorporates Eq. 2 to correct the conductor loss for conductor profile. However, since the method of H&J uses the simplified equation for the phase constant (Eq. 6), changing the conductor loss does not alter the calculated phase constant.

Copper foil cladding and profile measurements. The majority of planar circuit substrates are clad with one of three types of commercially available copper foil specifically manufactured for that purpose: rolled annealed (RA), electrodeposited (ED) and reverse-treated (RT). The foils are treated by the foil manufacturers with different types of treatments to improve and preserve adhesion to different types of circuit substrates. Historically, high-profile (“rough”) foils have been used to increase adhesion to the dielectric material, while lower profile foils are used to improve etch definition or reduce conductor loss.

The surface profiles in the current work have been characterized using a Veeco Metrology Wyko NT1100 optical profiling system. The profile can be characterized by a variety of different statistics, including rz, the peak-to-valley roughness, rq (or RRMS), the root-mean-square roughness, and the surface area index. RRMS is most widely used in characterizing conductor roughness in high-frequency electrical applications.

RA foil is produced from an ingot of solid copper by successively passing it though a rolling mill. After rolling, the foil itself is very smooth, with an RMS profile (RRMS) of 0.1 to 0.2 µm. For printed circuit substrate applications, the foil manufacturer additively treats the rolled foil, increasing the RRMS to 0.4 to 0.5 µm on the treated side.

ED foil is produced by plating from a copper sulfate solution onto a slowly rotating, polished stainless steel drum. The “drum side” of ED foil exhibits an RRMS of about 0.1 to 0.2 µm, similar to untreated RA foil. The profile of the “bath side” of the plated foil is controlled by the plating conditions, but is considerably higher in profile than the drum side. The ED foil manufacturer generally applies a further plated treatment to the bath side of the foil for improved adhesion and chemical compatibility with the intended dielectric material. ED foils have historically been manufactured with RRMS values in the range of 1 to 3 µm. The 2500X SEM photograph visually demonstrates the difference between a high profile (3 µm RMS) ED foil and a low profile (0.5 µm RMS) RA foil (Figure 3).

RT foil is produced from an ED-based foil. To produce RT foil, the adhesion promoting treatment is applied to the drum side of the base foil. In our experience, the RRMS values for RT foil are typically 0.5 to 0.7 µm.

In the present study, samples were clad with one type of RA foil with an RRMS of 0.4 µm, three grades of RT foil with RRMS values of 0.5, 0.6 and 0.7 µm, and two grades of ED foils with RRMS values of 1.5 and 3.0 µm.

The microstrip samples were held in an Intercontinental Microwave W-7000 Universal Substrate Fixture. The setup was SOLT calibrated to the cable ends. The S11, S21 and phase length of 3.5˝ and 7.0˝ long samples were measured using an Agilent PNA-L 50 GHz network analyzer. S11 was generally lower than –20 dB over the frequency range recorded. The S21 values and phase length values of the short samples were subtracted from those of the long samples and divided by the difference in length to yield the transmission line’s insertion loss (dB/inch) and differential phase length (radians/inch).

Results. Insertion loss results up to 50 GHz (Figure 4) for copper foils with profiles of 0.5, 0.7, 1.5 and 3.0 µm on the 0.004˝ thick LCP dielectric material show a number of interesting features. The measured data for the 0.5 µm profile foil nearly match the line calculated for smooth foil using the method of H&J and the MWI impedance calculator. The line calculated for conductor profile of 1.5 µm (white line) matches the measured data at low frequencies, but at frequencies higher than about 20 GHz, the measured data are substantially higher in loss than the calculated data. The same general features are exhibited by the 3 µm profile measured and calculated data.

The calculated line for 3 µm profile (black diamonds) matches the measured data up to about 10 GHz. At higher frequencies, the measured data exhibit substantially higher insertion loss than the calculated line.

One should also note the calculated insertion loss for the 1.5 and 3 µm profile conductors are essentially identical beyond about 15 GHz, while the measured data show that the 3 µm profile foil is higher loss all the way to the maximum measured frequency of 50 GHz.

These data clearly show that saturation does not occur, at least up to frequencies of 50 GHz, and that the effect of conductor profile is larger than predicted by the Morgan correlation at frequencies above 10 GHz.

The effective dielectric constant of the microstrip circuit, Keff, was calculated from the differential phase length from 8 to 50 GHz, and smoothed with a fourth order polynomial fit, and the data are plotted for the four copper types in Figure 5. There is a substantial effect of the copper profile on the Keff value. For the 0.5 µm profile foil, the Keff value is about 2.36 at 10 GHz, while the value for the 3 µm profile foil is 2.66 at the same frequency. Clearly, the propagation constant is strongly affected by the conductor profile.

One measure of the magnitude of the effect of conductor roughness on the propagation constant is to “back calculate” the substrate dielectric constant, Ksub, using the measured dimensions of the microstrip transmission line and the Keff calculated from the measured differential phase length. Figure 6 shows results of calculating Ksub using the equations of H&J in the MWI impedance calculator, and the Keff data shown in Figure 5. Clearly, changing the copper profile alone makes a substantial difference in the calculated Ksub for 0.004˝ thick laminate. The laminate clad with the 3 µm RMS profile foil exhibits a calculated Ksub nearly 15% higher than that of the same material clad with the 0.4 µm RMS profile foil.

Additionally, the insertion loss and phase length of 50Ω transmission lines were measured from 5 to 35 GHz on a series of LCP laminates ranging in thickness from 0.004˝ to 0.020˝ in 0.004˝ increments. The materials were clad with three types of copper foil: 0.4 µm RMS profile RA foil, 0.6 µm RMS RT foil, and 3 µm RMS ED foil.
A plot of the calculated Ksub (calculated again from the phase length data using the equations of H&J) versus frequency (Figure 7) is shown for the five different laminate thicknesses clad with the low profile (0.4 µm RMS) RA foil. The Ksub value increases less than 2% as the laminate thickness is reduced from 0.020˝ to 0.004˝, and the Ksub versus frequency is relatively flat.

A similar plot (Figure 8) for the same materials clad with the high-profile (3 µm RMS) ED foil shows quite different behavior. The calculated Ksub for the 0.004˝ laminate is about 12% higher than that calculated for the 0.020˝ material.

A plot of the Ksub averaged from 5 to 34 GHz versus laminate thickness (Figure 9) from the same data set demonstrates again that the circuits clad with the low profile exhibit only a small change in Ksub, while the high-profile foil-clad laminates exhibit a large increase as laminate thickness decreases.

We emphasize that the intrinsic substrate dielectric constant cannot be a function of the RMS roughness of the copper foil. Rather, the conclusion is that this apparent dependence of the dielectric constant on conductor profile illustrates an inadequacy of the previously applied conductor models.

“Dispersion” is the change in dielectric constant with frequency. For all well-behaved dielectric materials, there is a general decrease in dielectric constant as frequency increases. For the present analysis, we have quantified dispersion as the difference in calculated Ksub at 5 GHz and 34 GHz. A plot of dispersion versus laminate thickness (Figure 10) shows there is a relatively small increase in dispersion as one decreases the laminate thickness when the material is clad with the low-profile foil, and a comparatively large increase in dispersion when clad with the high-profile foil.

Modeling of current results. Based on the results of Tsang et al9 and Ding et al10, detailed modeling of the conductor profile at least qualitatively matches the features of loss data observed in the present work. Both the “greater than factor of two” increase in conductor loss due to profile and the “lack of saturation” (at least up to 50 GHz) are calculated in these references and experimentally observed in the current work.

Deutsch et al11 also show that complete electromagnetic wave simulation, which includes detailed roughness, predicts an increase in phase constant that is similar in magnitude to that seen in present work. These complete simulations, which include the submicron scale of roughness, will be very time-consuming, particularly on structures of any practical degree of complexity.

On the other end of the spectrum of simplicity, models such as Hammerstad and Jensen2, while including the “Morgan correlation’s” effect of conductor profile on loss (Eq. 2), show no effect of loss on the phase constant, since β is calculated using Eq. 6.

The authors tested several circuit simulation software packages and found similar results: Changes in the input conductor loss did not cause any change in the calculated phase constant.

To match the increase in conductor loss of higher profile foils, some circuit design software providers advise decreasing the value of the conductor conductivity, s, input to the model. The authors also tested several software packages by varying the input value of σ input to the model observing the effect on the s phase constant. In some cases, changing the input value of conductivity to the model did not cause a change in b. The models presumably calculate the phase constant by Eq. 6.

In more detailed software models, decreasing the input value of conductivity indeed increased the phase constant (as suggested by Eq. 5). However, as will be demonstrated in the following section, the measured increase in phase constant is considerably larger than that caused by the increase in loss alone.

Evidently, the conductor roughness itself imparts changes in the conductor performance that are reflected in a new conductor model presently under consideration by Sonnet Software.

Considerations on Modeling Surface Roughness
A spectrum of modeling approaches addresses the surface roughness problem. At the very high end are full three-dimensional volume meshing EM tools like CST and HFSS. In these cases, one can analyze the actual shape of the conductor surface. This has the advantage that the possibly very complicated frequency-dependent effect due to specific microstructure in the conductor surface is precisely included. The disadvantage is that analysis time is excessive for all but the simplest of circuits.

In addition, the exact microstructure, or even important aspects of the nature of the microstructure, might not be known.

At the other end of the spectrum, we have empirically derived closed-form models, such as Hammerstad and Jensen, that have been available for the better part of a half-century. While these are simple, widely used and easily programmed, in certain cases they show considerable error when compared to measurement. An example of a shortcoming typical of these models is the failure to include the effect of loss on the phase constant.

In the mid-ground are closed-form surface impedance models combined with planar EM analysis. The simplest model is to include resistance based on skin effect, which varies with square root of frequency. This fails at low frequency because square root of frequency is zero at DC, but the resistance is not zero. The next step up in sophistication correctly includes the transition between skin effect (high frequency) and pure resistance (low frequency). This is the level at which most planar EM software now exists.

Proceeding one step higher, the surface impedance model can include surface inductance, which is also inherent in skin effect, but is often ignored in microwave design tools. (This is the present model used by Sonnet Software.) As we show here, even this additional surface inductance is not sufficient to explain large discrepancies from measured results that include surface roughness. This is where the most sophisticated surface impedance model, with results reported here, becomes critical for design success.

Surface roughness effects on insertion loss. Figure 11 shows measured insertion loss for the novel substrate of 0.004˝ thickness. There are two measured curves. The better, lower insertion loss curves are for 0.5 oz (0.0007˝ thick) RA copper foil with an RMS surface profile of 0.4 µm. This profile value is about 0.4% of the substrate thickness. We choose to use this case to approximate perfectly smooth foil.

The higher insertion loss curve in Figure 11 was measured on a 50 Ω microstrip transmission line made on the same substrate, but clad with the 0.5 oz. ED foil with the 3.0 µm RMS profile. This profile represents about 3% of the substrate thickness.

The measured insertion loss curves are to be compared with three curves simulated by Sonnet Software, using the measured physical dimension of the actual circuits, a eR value of about 3.0, and tand of 0.002 for the LCP dielectric material.

Looking at the lower insertion loss curves, the “Sonnet – smooth Cu” curve is a nearly perfect match to the measured insertion loss for the smooth foil, “Measured – 0.4 µm foil.” This curve was calculated using the laboratory value of copper conductivity (s = 5.8×107 S/m).

However, we have a different story for the lower set of three curves. In the first simulation attempt, we match the higher frequency insertion loss values by decreasing the input value of the copper conductivity to a factor of 0.12 times that of copper (s = 0.7×107 S/m). The measured data for the 3.0 µm RMS foil do not show a good match with Sonnet data that were calculated in this manner. In fact, at low frequency, the error approaches 100%. In addition, the DC resistance of the line is now
substantially increased (by 1 / 0.12 = 8.3 times).

In the third simulation, we use a new conductor model, which adjusts the conductor properties appropriately to reflect the effect of the conductor profile. We note, however, that the new Sonnet model for roughness represents the insertion loss nearly perfectly.

Surface roughness effects on Keff. If we temporarily ignore the erroneously high values of insertion loss at lower frequency in Figure 11 and use the same decrease in conductor conductivity (to a value of s = 0.7 × 107 S/m ) to model the effective dielectric constant, Keff, of the microstrip lines, we will note that the agreement between predicted and measured values is even poorer.

In Figure 12, the five curves are for the same five cases; only now the measured effective dielectric constant, Keff, is plotted versus frequency. In this case, the lower two curves are for the smooth foil case. The measured and Sonnet-calculated Keff values are nearly identical. Notice the measured Keff for the rough foil case is much higher. One can imagine the current flowing in and the skin depth is on the order of (or less than) the RMS surface roughness. Ideal skin effect increases both surface resistance and surface inductance. Thus, a decrease in bulk conductivity should increase Keff. However, merely decreasing the bulk conductivity to the value of s = 0.7×107 S/m that best fits the insertion loss data does not increase the Keff nearly enough to match the measured data for 3 µm RMS profile foil. This approach results in a Keff increase of only about 2%. The measured increase is greater than 10%.

Comparing the upper two curves for measured data on 3 µm RMS foil and the same Sonnet new conductor model that perfectly predicted the insertion loss in Figure 11, one will note that the new Sonnet roughness model duplicates the Keff almost perfectly across the frequency range.

Verifying results as a function of substrate thickness. The next question is whether the same conductor roughness model can predict the measured effective dielectric constant for different thickness substrates that use the same foil. Figures 13-18 show three more cases using exactly the same Sonnet metal roughness model developed for the 0.004˝ laminate. In these three pairs of figures, we clearly demonstrate that the measured values of insertion loss and Keff on 0.008˝-, 0.012˝- and 0.016˝-thick substrates (clad with the same foils used in the 0.004˝ laminate example) are matched very well by the simulations using the measured circuit dimensions and the same new conductor model developed for the 0.004˝ laminate. We see that the new conductor model matches the measured data nearly perfectly in all cases.

The fact that the predicted Keff values match the measured values over the entire frequency range also demonstrates that the new conductor model accurately predicts the higher dispersion for high-profile foils on thinner substrates shown in Figure 10.

Conclusions

  • Contrary to early correlations, but consistent with more recent modeling,9,10 it is experimentally demonstrated that conductor roughness can cause more than a factor of two increase in conductor loss.
  • Again, contrary to earlier correlations, but consistent with the more recent reference,9,10 “saturation” does not occur, at least up to 50 GHz. This means a lower profile foil will exhibit lower conductor loss than a higher profile foil, even at higher frequencies.
  • An unexpected influence of conductor profile on the phase constant is particularly evident in thinner laminates. The effect is larger than predicted simply by including the loss, and appears to be directly related to the profile itself.

The above data show that simply decreasing conductor bulk conductivity or applying a roughness correction factor to the attenuation constant is an inappropriate model for including the effect of surface roughness, both with respect to insertion loss and with respect to Keff. The new Sonnet conductor roughness model, however, can achieve a very high degree of agreement with measured data of both insertion loss and Keff, and is experimentally shown to be independent of substrate thickness.

Acknowledgments
The authors would like to thank Professor Rajeev Bansal, University of Connecticut, Storrs, for helpful conversations, calculations and advice, and Dr. Gongxian Jia, Huawei Technologies Co., for confirming measurements and conversations.

Ed.: For a list of references, see the online version. This article was drawn from a paper of the same title presented at DesignCon 2010, and is published here with permission of DesignCon.

Allen F. Horn, III, Ph.D., is an associate research fellow; John W. Reynolds is senior engineering assistant, and Patricia A. LaFrance is engineering assistant at Rogers Corp. (rogerscorp.com). James C. Rautio, Ph.D., is founder of Sonnet Software (sonnetsoftware.com).

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