Mixing imperial and metric printed circuit board (PCB) design layout units adds a level of complication to the design process. The accepted PCB design process begins with building computer-aided design (CAD) library parts, moves to part placement and ends with via fanout and trace routing challenges. The most basic common denominator in this process is the grid system. Data for machine production can be simplified by using consistent PCB design layout units throughout the design process. In this article, I will review one of the single most important, but basic, aspects of the electronics industry – The PCB design grid system.
From the 1960s through the 1980s, the primary PCB design grid system used Imperial units. All design features and grid layouts were in 0.001-inch (1-ml) increments, and everything was symmetrical and evenly balanced. In the mid 1980s, the International Engineering Consortium (IEC) released IEC 60097 Grid System for Printed Circuits. In 1987, IPC’s SM-782 Land Patterns publication was published with metric dimensions, and in 1988, Congress passed the Omnibus Trade and Competitiveness Act of 1988. This legislation amended the Metric Conversion Act of 1975 and designated the metric system as the preferred system of weights and measures for US trade and commerce. Shortly thereafter, component manufacturers around the globe started using the metric system designations.
The transition from one unit system to another introduced a new level of complication in the PCB design industry because designers were forced to use two different unit systems during the transition period. The complication became even more pronounced with the introduction of gridless and shaped-based autorouting. The main impact of the gridless system for PCB layout is the fact that trace routing computations are so granular that they consume far more memory and central processing units (CPUs). The gridless system has tens of thousands of additional options to commutate and actually slows the autorouting tools down. It also makes it extremely difficult to cleanly route traces in between the center of two component leads or vias manually.
The universal PCB design grid system impacts everything from CAD library creation to part placement, from via fanout to trace routing, while consuming far less computer memory and CPU processing. It also centers traces between pins and vias, increasing manufacturing yields while improving the overall aesthetic look of the part placement and the trace routing. The ultimate goal for IPC Standards and for designing a perfect PCB is to have all element feature sizes in the PCB design rounded off in 0.05-mm increments and snapped to a 0.05-mm grid system. The following pages explain the criteria needed to follow this universal PCB design grid system and to learn how advanced it really is.
Land Pattern CAD Library Creation
With guidance provided by the organizations in the accompanying sidebar, PCB designers have built rules for creating consistent, quality land patterns in their CAD tools. In the ideal universal grid system, 0.05 mm matches many elements. There are unique exceptions to these rules, but these are true most of the time.
Generic Sizes for all CAD Library Land Patterns for both SMT and PTH according to IPC:
Outlines are in 0.05-mm increments, includes silkscreen, assembly and placement courtyard.
Pad sizes are in 0.05-mm increments.
Hole sizes are in 0.05-mm increments.
Polarity markings are in 0.05-mm increments.
Local fiducials are in 0.05-mm increments.
Reference designator height and line widths are in 0.05-mm increments.
Ball Grid Array Standards for Packages in the IPC-7351 Standard:
Ball and sand sizes are in 0.05-mm increments.
Pin pitches are on 0.05-mm increments.
Package body outline dimensions are in 0.05-mm increments.
Gull Wing Component Lead Standards for QFP, SOP and SOT Packages from JEDEC:
Package body outline dimensions are in 0.05-mm increments.
Package tolerances are in 0.0-5mm increments.
Terminal lead sizes are in 0.05-mm increments.
Pin pitches, land size round-offs “X, Y” are on 0.05-mm increments and land centers “C” are on 0.1-mm increments. (See FIGURE 1).
Chip Component Lead Standards for Resistor, Capacitor, Diode and Inductor Packages by EIA:
Package body for outline length and width dimensions are in 0.05-mm increments.
Terminal lead sizes are in 0.05-mm increments.
Land size round-offs “X, Y” are on 0.05-mm increments & land centers “C” are on 0.1-mm increments.
No-Lead Component Lead Standards for SON, QFN, DFN, SOTFL and SODFL by JEDEC:
Pin pitches are on 0.05-mm increments.
Package body outline dimensions are in 0.05-mm increments (includes height).
Terminal lead sizes are in 0.05-mm increments.
Package tolerances are in 0.05-mm increments.
The basic rule, in today’s component package technology, is that most of the time component package dimensions and solder terminal leads are in 0.05-mm increments. The exceptions to this rule are all component packages that have been carried over from the 1980s. In order for a complete transition to the metric system and a the introduction of a full-blown electronic product development automation, the inch- based component packages would have to be eliminated.
Part Placement Grid System
If you build your CAD library parts in millimeter units, the best placement grid rule is to use numbers that can be evenly divided into 1 mm and are one place to the right of the decimal point. Optimized metric placement grids include: 1 mm, 0.5 mm, 0.2 mm and 0.1 mm. To achieve the best results, no other part placement grids should be used unless absolutely necessary (for instance, in the case of a fixed connector or switch on the PCB edge).
Via Size and Fanout Grid System
Via padstack sizes are in increments of 0.05 mm. This includes all via hole sizes.
The best via padstack for overall trace routing is: 0.5-mm pad, 0.25-mm hole and 0.7-mm plane antipad.
If every via in the PCB design was placed on a 1-mm grid system, the traces could be routed across the design layout without unnecessary bends. The best via fanout grid is 1 mm. This allows for two 0.1-mm traces to be routed in between vias, as illustrated in FIGURES 2, 3 and 4.
Figure 4 clearly illustrates two vias snapped on a 1-mm grid with two, 0.1-mm traces perfectly centered between them. You can also route one, 0.1-mm trace between the vias perfectly centered. The plane antipad does not encroach under the traces and provides a clean return path on the reference plane. This is a superior routing solution for high-speed technology while providing a simplified working environment.
Trace / Space Size Grid System
Metric trace width rules are in increments of 0.05 mm with one exception: 0.125 mm (5 mils).
0.25 mm = 10 mils
0.20 mm = 8 mils
0.15 mm = 6 mils
0.125 mm = 5 mils
0.10 mm = 4 mils
0.075 mm = 3 mils
0.05 mm = 2 mils
Trace Routing Grid System
The ultimate metric routing grid is 0.05 mm.
Reference Designators and Text Grid System
The common grid for placing reference designators and text is 0.1 mm, but 0.05 mm is used for tight spaces.
Copper Pour and Plane Fill Grid System
The common grid for copper pour outlines and snap grid is 0.1 mm, but 0.05 mm can be used for high- density part placement and trace routing.
Mounting Hole Size and Placement Grid System
All mounting hole padstacks are in increments of 0.05 mm, and the placement grid is in 0.05-mm increments.
Conclusion
The United States is now the only industrialized country in the world that does not use the metric system as its predominant system of measurement. However, PCB design worldwide has been historically driven by component manufacturers and CAD vendors to use the Imperial measurement system.
Clearly, U.S. companies that do not produce products or services to metric specifications will risk becoming increasingly noncompetitive in world markets. Japan has identified the United State’s lack of metric usage as a strategic impediment to access its products to the Japanese home market. In addition, consolidation of the European market product standards will make sales of nonmetric products increasingly difficult and uncertain. Most U.S. companies understand that using metric units is essential to future economic success.
Through their actions, U.S. Federal agencies are demonstrating an increasing determination to use the metric system in business-related activities. For example, most component manufacturers have converted their component dimensional datasheets to millimeter units. Many of the results are not yet visible to the public, which is not a direct target of current Federal transition activities.
Industry acceptance of the metric transition is due partly to the realization that producing to metric specifications and surviving in tomorrow’s economic environment are synonymous. Today, most companies export their products to a global market where metric-based products are expected.
Sidebar
Electronic Standard Organizations
Standard component package outlines come from industry standard organizations that specialize in component packaging data and standardization of documents and publications.
Standards organizations descriptions :
JEDEC – Joint Electron Device Engineering Council. This semiconductor engineering standardization body represents all areas of the electronics industry including discrete component and integrated circuit packaging standards.
EIA –Electronic Industries Alliance. A national trade organization that includes the full spectrum of U.S. manufacturers for tape and reel, tray and tube component packaging standards. The EIA-481-D-2008 publication is the most recent.
IEC – International Electrotechnical Commission. IEC is the leading global organization that prepares and publishes international standards for all electrical, electronic and related technologies, as well as associated general disciplines such as terminology and symbols.
NIST – National Institute of Standards and Technology. From atomic clocks to semiconductors, innumerable products and services rely in some way on NIST. NIST’s mission is to develop and to promote measurement, standards and technology to enhance productivity, to facilitate trade and to improve the quality of life.
IPC – Association Connecting Electronics Industries. IPC is the only trade association that brings together all of the players in this industry: PCB designers, manufacturers, assembly companies, suppliers and original equipment manufacturers (OEMs).
ANSI – The American National Standards Institute. ANSI’s mission is to enhance both the global competitiveness of U.S. business and the quality of life by promoting and facilitating voluntary consensus standards and conformity assessment systems, while safeguarding their integrity.
EIAJ – Electronic Industries Association of Japan. EIAJ’s mission is to represent the domestic electronics industry in working on the challenges and issues it faces including programs planned and implemented with the cooperation of related organizations and associations worldwide.
NEMI – National Electronics Manufacturing Initiative. NEMI is an industry-led consortium whose mission is to assure leadership of the global electronics manufacturing supply chain. It has a membership that includes hundreds of electronic component manufacturers, suppliers, associations, government agencies and universities.
JEITA – Japan Electronics and Information Technology Industries Association. JEITA is an industry organization in Japan with activities covering both the electronics and information technology (IT) fields. JEITA covers electronic components, radio and broadcasting equipment, computers, medical devices, measure and control systems and assemblies.
Ed. – A comment from NIST – http://ts.nist.gov/WeightsAndMeasures/Metric/lc1136a.cfm#history
Tom Hausherr is an EDA library product manager with Valor Computerized Systems. He can be reached at: This email address is being protected from spambots. You need JavaScript enabled to view it..